[llvm] 4306cfd - [RISCV] Fix using undefined variable %pt2 in mask-reg-alloc.mir testcase (#70764)

[via llvm-commits]

Author: Jim Lin
Date: 2023-11-07T17:05:03+08:00
New Revision: 4306cfd40e0b8f404da384fa67a046b9e50d7239

URL: https://github.com/llvm/llvm-project/commit/4306cfd40e0b8f404da384fa67a046b9e50d7239
DIFF: https://github.com/llvm/llvm-project/commit/4306cfd40e0b8f404da384fa67a046b9e50d7239.diff

LOG: [RISCV] Fix using undefined variable %pt2 in mask-reg-alloc.mir testcase (#70764)

First PseudoVMERGE_VIM_M1 should use %pt1 as its operand instead of
%pt2.

I found this error when I add LiveIntervals analysis pass in my
downstream. And it crashes with the message:

```
Use of %7 does not have a corresponding definition on every path:
112r %6:vrnov0 = PseudoVMERGE_VIM_M1 %pt2:vrnov0(tied-def 0), %2:vr, 1, %4:vmv0, 1, 3
LLVM ERROR: Use not jointly dominated by defs.
```

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir b/llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
index f6d9feea47b5a5f..0e207731e020b83 100644
--- a/llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
@@ -28,7 +28,7 @@ body:             |
     %3:vr = COPY $v3
     %4:vmv0 = COPY %0
     %pt1:vrnov0 = IMPLICIT_DEF
-    %5:vrnov0 = PseudoVMERGE_VIM_M1 %pt2, killed %2, 1, %4, 1, 3
+    %5:vrnov0 = PseudoVMERGE_VIM_M1 %pt1, killed %2, 1, %4, 1, 3
     %6:vmv0 = COPY %1
     %pt2:vrnov0 = IMPLICIT_DEF
     %7:vrnov0 = PseudoVMERGE_VIM_M1 %pt2, killed %3, 1, %6, 1, 3