[llvm] [RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (PR #71501)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 7 00:50:42 PST 2023
================
@@ -3362,7 +3362,9 @@ static bool usesAllOnesMask(SDNode *N, unsigned MaskOpIdx) {
static bool isImplicitDef(SDValue V) {
return V.isMachineOpcode() &&
- V.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF;
+ (V.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF ||
+ (V.getMachineOpcode() == TargetOpcode::EXTRACT_SUBREG &&
+ isImplicitDef(V.getOperand(0))));
----------------
lukel97 wrote:
This is needed for the implicit_def -> noregister peephole: Without it we lose some CSE when we have (vmv_s_x IMPLICIT_DEF, ...) and (vmv_s_x (extract_subreg IMPLICIT_DEF, ...), ...)
https://github.com/llvm/llvm-project/pull/71501
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