[llvm] [AMDGPU] Folding imm offset in more cases for scratch access (PR #70634)

[Matt Arsenault via llvm-commits]

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@@ -1886,7 +1899,8 @@ bool AMDGPUDAGToDAGISel::SelectScratchSVAddr(SDNode *N, SDValue Addr,
     return false;
   }
 
-  if (!isFlatScratchBaseLegal(SAddr) || !isFlatScratchBaseLegal(VAddr))
+  if (!isFlatScratchBaseLegal(Addr, SAddr) ||
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arsenm wrote:

@rampitec I thought this was sorted out already, is the documentation correct? When scratch instructions were initially introduced, they had signed offsets that didn't behave correctly so we treated them as unsigned with a lost bit. I thought we only switched to using them on targets where the signed behavior was corrected. Is this not the case?

https://github.com/llvm/llvm-project/pull/70634