[llvm] [RISCV] Add bset optimization for left shift code (PR #71420)

[Craig Topper via llvm-commits]

================
@@ -554,6 +554,8 @@ def : Pat<(XLenVT (and (shiftop<srl> GPR:$rs1, (XLenVT GPR:$rs2)), 1)),
 
 def : Pat<(XLenVT (shiftop<shl> 1, (XLenVT GPR:$rs2))),
           (BSET (XLenVT X0), GPR:$rs2)>;
+def : Pat<(XLenVT (xor (shiftopw<riscv_sllw> -1, (XLenVT GPR:$rs2)), -1)),
----------------
topperc wrote:

I'm not referring to the encoding of the instruction. I'm referring to which bits of the register are used. Bset looks at the log2(xlen) bits of rs2 to determine which bit to set.

https://github.com/llvm/llvm-project/pull/71420