[llvm] [RISCV][GlobalISel] Vector Extension vadd Legalizer (PR #71400)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 6 10:30:31 PST 2023


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@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+v -stop-after=irtranslator | FileCheck %s --check-prefixes=CHECK,RV32
+; RUN: llc -mtriple=riscv64 -mattr=+v --stop-after=irtranslator | FileCheck %s --check-prefixes=CHECK,RV64
+
+define <vscale x 1 x i8> @vadd_vv_mask_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %mask) {
----------------
michaelmaitland wrote:

If I understand correctly, you'd like to test the code generation for the `  %vc = add <vscale x 1 x i8> %va, %vs` here. Can you accomplish that with the following simplification:

```ll
define <vscale x 1 x i8> add_nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b) {
  %c = add <vscale x 1 x i8> %a, %b
  ret <vscale x 1 x i8> %c
}
```

https://github.com/llvm/llvm-project/pull/71400


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