[llvm] [InstCombine] Extend `foldICmpBinOp` to `add`-like `or`. (PR #71396)

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``````````bash
git-clang-format --diff bdac9720712aedae04ba96c53775d59e80aae69b f4346fcd9be66472ca850b0efc08f3adaa797385 -- llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 9b7edbe31..2ea18e046 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -4569,12 +4569,12 @@ static bool isAddLike(const Instruction &I, const SimplifyQuery &SQ) {
   if (Opc == Instruction::Add)
     return true;
   if (Opc == Instruction::Or) {
-    return haveNoCommonBitsSet(I.getOperand(0), I.getOperand(1), SQ.getWithInstruction(&I));
+    return haveNoCommonBitsSet(I.getOperand(0), I.getOperand(1),
+                               SQ.getWithInstruction(&I));
   }
   return false;
 }
 
-
 /// Try to fold icmp (binop), X or icmp X, (binop).
 /// TODO: A large part of this logic is duplicated in InstSimplify's
 /// simplifyICmpWithBinOp(). We should be able to share that and avoid the code
@@ -4657,18 +4657,16 @@ Instruction *InstCombinerImpl::foldICmpBinOp(ICmpInst &I,
   if (BO0 && isa<OverflowingBinaryOperator>(BO0)) {
     Op0HasNUW = BO0->hasNoUnsignedWrap();
     Op0HasNSW = BO0->hasNoSignedWrap();
-    NoOp0WrapProblem =
-        ICmpInst::isEquality(Pred) ||
-        (CmpInst::isUnsigned(Pred) && Op0HasNUW) ||
-        (CmpInst::isSigned(Pred) && Op0HasNSW);
+    NoOp0WrapProblem = ICmpInst::isEquality(Pred) ||
+                       (CmpInst::isUnsigned(Pred) && Op0HasNUW) ||
+                       (CmpInst::isSigned(Pred) && Op0HasNSW);
   }
   if (BO1 && isa<OverflowingBinaryOperator>(BO1)) {
     Op1HasNUW = BO1->hasNoUnsignedWrap();
     Op1HasNSW = BO1->hasNoSignedWrap();
-    NoOp1WrapProblem =
-        ICmpInst::isEquality(Pred) ||
-        (CmpInst::isUnsigned(Pred) && Op1HasNUW) ||
-        (CmpInst::isSigned(Pred) && Op1HasNSW);
+    NoOp1WrapProblem = ICmpInst::isEquality(Pred) ||
+                       (CmpInst::isUnsigned(Pred) && Op1HasNUW) ||
+                       (CmpInst::isSigned(Pred) && Op1HasNSW);
   }
 
   // Analyze the case when either Op0 or Op1 is an add instruction.
@@ -4805,12 +4803,14 @@ Instruction *InstCombinerImpl::foldICmpBinOp(ICmpInst &I,
       if (AP1Abs.uge(AP2Abs)) {
         APInt Diff = *AP1 - *AP2;
         Constant *C3 = Constant::getIntegerValue(BO0->getType(), Diff);
-        Value *NewAdd = Builder.CreateAdd(A, C3, "", Op0HasNUW && Diff.ule(*AP1), Op0HasNSW);
+        Value *NewAdd = Builder.CreateAdd(
+            A, C3, "", Op0HasNUW && Diff.ule(*AP1), Op0HasNSW);
         return new ICmpInst(Pred, NewAdd, C);
       } else {
         APInt Diff = *AP2 - *AP1;
         Constant *C3 = Constant::getIntegerValue(BO0->getType(), Diff);
-        Value *NewAdd = Builder.CreateAdd(C, C3, "", Op1HasNUW && Diff.ule(*AP1), Op1HasNSW);
+        Value *NewAdd = Builder.CreateAdd(
+            C, C3, "", Op1HasNUW && Diff.ule(*AP1), Op1HasNSW);
         return new ICmpInst(Pred, A, NewAdd);
       }
     }
@@ -4904,16 +4904,14 @@ Instruction *InstCombinerImpl::foldICmpBinOp(ICmpInst &I,
                   isKnownNonZero(Z, Q.DL, /*Depth=*/0, Q.AC, Q.CxtI, Q.DT);
         // if Z != 0 and nsw(X * Z) and nsw(Y * Z)
         //    X * Z eq/ne Y * Z -> X eq/ne Y
-        if (NonZero && BO0 && BO1 && Op0HasNUW &&
-            Op1HasNSW)
+        if (NonZero && BO0 && BO1 && Op0HasNUW && Op1HasNSW)
           return new ICmpInst(Pred, X, Y);
       } else
         NonZero = isKnownNonZero(Z, Q.DL, /*Depth=*/0, Q.AC, Q.CxtI, Q.DT);
 
       // If Z != 0 and nuw(X * Z) and nuw(Y * Z)
       //    X * Z u{lt/le/gt/ge}/eq/ne Y * Z -> X u{lt/le/gt/ge}/eq/ne Y
-      if (NonZero && BO0 && BO1 && Op0HasNUW&&
-          Op1HasNUW)
+      if (NonZero && BO0 && BO1 && Op0HasNUW && Op1HasNUW)
         return new ICmpInst(Pred, X, Y);
     }
   }

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https://github.com/llvm/llvm-project/pull/71396