[llvm] TableGen support for RegisterBankInfo (PR #71357)

[via llvm-commits]

github-actions[bot] wrote:

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git-clang-format --diff 4704eaf234c3c30117caacd7b073d6dd63fd0f65 e74d92530b75ec4d653a35dc7ec82ba96fd339f9 -- llvm/utils/TableGen/RegisterBankEmitter.cpp
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View the diff from clang-format here.
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diff --git a/llvm/utils/TableGen/RegisterBankEmitter.cpp b/llvm/utils/TableGen/RegisterBankEmitter.cpp
index 2e0b282f3243..37b9c0fc92d9 100644
--- a/llvm/utils/TableGen/RegisterBankEmitter.cpp
+++ b/llvm/utils/TableGen/RegisterBankEmitter.cpp
@@ -319,8 +319,7 @@ void RegisterBankEmitter::emitRBIHeader(
 }
 
 void RegisterBankEmitter::emitRBIImplementation(
-    raw_ostream &OS,
-    const StringRef TargetName,
+    raw_ostream &OS, const StringRef TargetName,
     const std::vector<RegisterBank> &Banks) {
   const CodeGenRegBank &RegisterClassHierarchy = Target.getRegBank();
 

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https://github.com/llvm/llvm-project/pull/71357