[llvm] renamed emitRBIIMPL and other small changes (PR #71344)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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git-clang-format --diff 6c59f0e1b0fb56c909ad7c9aad4bde37dc006ae0 d6f25b08833463b4caa4148dee629c8e9f900a12 -- llvm/utils/TableGen/RegisterBankEmitter.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/utils/TableGen/RegisterBankEmitter.cpp b/llvm/utils/TableGen/RegisterBankEmitter.cpp
index ad87c9a4d06b..93d1f077750e 100644
--- a/llvm/utils/TableGen/RegisterBankEmitter.cpp
+++ b/llvm/utils/TableGen/RegisterBankEmitter.cpp
@@ -116,7 +116,7 @@ private:
   void emitRBIHeader(raw_ostream &OS, const StringRef TargetName,
                      const std::vector<RegisterBank> &Banks);
   void emitRBIImplementation(raw_ostream &OS, const StringRef TargetName,
-                   const std::vector<RegisterBank> &Banks);
+                             const std::vector<RegisterBank> &Banks);
 
 public:
   RegisterBankEmitter(RecordKeeper &R) : Target(R), Records(R) {}
@@ -237,8 +237,8 @@ void RegisterBankEmitter::emitBaseClassImplementation(
       for (const auto &RC : RCs) {
         std::string QualifiedRegClassID =
             (Twine(RC->Namespace) + "::" + RC->getName() + "RegClassID").str();
-        OS << "    (1u << (" << QualifiedRegClassID << " - "
-           << LowestIdxInWord << ")) |\n";
+        OS << "    (1u << (" << QualifiedRegClassID << " - " << LowestIdxInWord
+           << ")) |\n";
       }
       OS << "    0,\n";
       LowestIdxInWord += 32;
@@ -318,9 +318,9 @@ void RegisterBankEmitter::emitRBIHeader(
      << "} // end namespace llvm\n";
 }
 
-void RegisterBankEmitter::emitRBIImplementation(raw_ostream &OS,
-                                      const StringRef TargetName,
-                                      const std::vector<RegisterBank> &Banks) {
+void RegisterBankEmitter::emitRBIImplementation(
+    raw_ostream &OS, const StringRef TargetName,
+    const std::vector<RegisterBank> &Banks) {
   const CodeGenRegBank &RegisterClassHierarchy = Target.getRegBank();
 
   OS << "namespace llvm {\n"

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https://github.com/llvm/llvm-project/pull/71344