[llvm] 39edac2 - [RISCV][GISel] Fix incorrect call to getGlobalAddress in selectGlobalValue.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 4 23:44:36 PDT 2023
Author: Craig Topper
Date: 2023-11-04T23:44:10-07:00
New Revision: 39edac23dfb7ead6da2c9b37c3286d06ea004e8d
URL: https://github.com/llvm/llvm-project/commit/39edac23dfb7ead6da2c9b37c3286d06ea004e8d
DIFF: https://github.com/llvm/llvm-project/commit/39edac23dfb7ead6da2c9b37c3286d06ea004e8d.diff
LOG: [RISCV][GISel] Fix incorrect call to getGlobalAddress in selectGlobalValue.
RISCVII::MO_HI was being passed to the offset argument instead of
the flags argument.
Adjust some other calls to not pass an explicit 0 to the offset argument
since it already has a default value of 0.
Added:
Modified:
llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value32.mir
llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value64.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp b/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
index 5a60924759233c9..6b5a96dbfc49fff 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
@@ -603,8 +603,8 @@ bool RISCVInstructionSelector::selectGlobalValue(
// Use PC-relative addressing to access the symbol. This generates the
// pattern (PseudoLLA sym), which expands to (addi (auipc %pcrel_hi(sym))
// %pcrel_lo(auipc)).
- Result = MIB.buildInstr(RISCV::PseudoLLA, {DefReg}, {})
- .addGlobalAddress(GV, 0);
+ Result =
+ MIB.buildInstr(RISCV::PseudoLLA, {DefReg}, {}).addGlobalAddress(GV);
} else {
// Use PC-relative addressing to access the GOT for this symbol, then
// load the address from the GOT. This generates the pattern (PseudoLGA
@@ -618,7 +618,7 @@ bool RISCVInstructionSelector::selectGlobalValue(
DefTy, Align(DefTy.getSizeInBits() / 8));
Result = MIB.buildInstr(RISCV::PseudoLGA, {DefReg}, {})
- .addGlobalAddress(GV, 0)
+ .addGlobalAddress(GV)
.addMemOperand(MemOp);
}
@@ -641,7 +641,7 @@ bool RISCVInstructionSelector::selectGlobalValue(
// (lui %hi(sym)) %lo(sym)).
Register AddrHiDest = MRI.createVirtualRegister(&RISCV::GPRRegClass);
MachineInstr *AddrHi = MIB.buildInstr(RISCV::LUI, {AddrHiDest}, {})
- .addGlobalAddress(GV, RISCVII::MO_HI);
+ .addGlobalAddress(GV, 0, RISCVII::MO_HI);
if (!constrainSelectedInstRegOperands(*AddrHi, TII, TRI, RBI))
return false;
@@ -673,14 +673,14 @@ bool RISCVInstructionSelector::selectGlobalValue(
DefTy, Align(DefTy.getSizeInBits() / 8));
Result = MIB.buildInstr(RISCV::PseudoLGA, {DefReg}, {})
- .addGlobalAddress(GV, 0)
+ .addGlobalAddress(GV)
.addMemOperand(MemOp);
} else {
// Generate a sequence for accessing addresses within any 2GiB range
// within the address space. This generates the pattern (PseudoLLA sym),
// which expands to (addi (auipc %pcrel_hi(sym)) %pcrel_lo(auipc)).
- Result = MIB.buildInstr(RISCV::PseudoLLA, {DefReg}, {})
- .addGlobalAddress(GV, 0);
+ Result =
+ MIB.buildInstr(RISCV::PseudoLLA, {DefReg}, {}).addGlobalAddress(GV);
}
if (!constrainSelectedInstRegOperands(*Result, TII, TRI, RBI))
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value32.mir
index bbc7bc893e682c1..8b4be5e475a30e7 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value32.mir
@@ -47,7 +47,7 @@ body: |
; RV32-NOPIE-TAG-NEXT: PseudoRET implicit $x10
;
; RV32-SMALL-NOPIE-NOTAG-LABEL: name: global_addr
- ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI @x + 4
+ ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @x
; RV32-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @x
; RV32-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
; RV32-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
@@ -80,7 +80,7 @@ body: |
; RV32-NOPIE-TAG-NEXT: PseudoRET implicit $x10
;
; RV32-SMALL-NOPIE-NOTAG-LABEL: name: extern_weak_global_addr
- ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI @y + 4
+ ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @y
; RV32-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @y
; RV32-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
; RV32-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
@@ -113,7 +113,7 @@ body: |
; RV32-NOPIE-TAG-NEXT: PseudoRET implicit $x10
;
; RV32-SMALL-NOPIE-NOTAG-LABEL: name: local_global_addr
- ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI @z + 4
+ ; RV32-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @z
; RV32-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @z
; RV32-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
; RV32-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value64.mir
index 440afaab7b28efe..8151749c3aef9b3 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/global-value64.mir
@@ -46,7 +46,7 @@ body: |
; RV64-NOPIE-TAG-NEXT: PseudoRET implicit $x10
;
; RV64-SMALL-NOPIE-NOTAG-LABEL: name: global_addr
- ; RV64-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI @x + 4
+ ; RV64-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @x
; RV64-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @x
; RV64-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
; RV64-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
@@ -79,7 +79,7 @@ body: |
; RV64-NOPIE-TAG-NEXT: PseudoRET implicit $x10
;
; RV64-SMALL-NOPIE-NOTAG-LABEL: name: extern_weak_global_addr
- ; RV64-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI @y + 4
+ ; RV64-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @y
; RV64-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @y
; RV64-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
; RV64-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
@@ -112,7 +112,7 @@ body: |
; RV64-NOPIE-TAG-NEXT: PseudoRET implicit $x10
;
; RV64-SMALL-NOPIE-NOTAG-LABEL: name: local_global_addr
- ; RV64-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI @z + 4
+ ; RV64-SMALL-NOPIE-NOTAG: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) @z
; RV64-SMALL-NOPIE-NOTAG-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) @z
; RV64-SMALL-NOPIE-NOTAG-NEXT: $x10 = COPY [[ADDI]]
; RV64-SMALL-NOPIE-NOTAG-NEXT: PseudoRET implicit $x10
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