[llvm] [X86InstrInfo] support memfold on spillable inline asm (PR #70832)
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 3 13:59:13 PDT 2023
================
@@ -10333,5 +10333,15 @@ void X86InstrInfo::genAlternativeCodeSequence(
}
}
+// See also: X86DAGToDAGISel::SelectInlineAsmMemoryOperand().
+void X86InstrInfo::getFrameIndexOperands(SmallVectorImpl<MachineOperand> &Ops) const {
+ Ops.append({
+ MachineOperand::CreateImm(1), // Scale
+ MachineOperand::CreateReg(0, false), // Index
+ MachineOperand::CreateImm(0), // Disp
+ MachineOperand::CreateReg(0, false), // Segment
+ });
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MatzeB wrote:
Yes addressing modes are highly target specific. I was just proposing it's use for the implementation within `X86InstrInfo::getFrameIndexOperands`
https://github.com/llvm/llvm-project/pull/70832
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