[llvm] [Mips] In LowerShift*Parts, xor with bits-1 instead of -1. (PR #71149)

[Simon Pilgrim via llvm-commits]

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@@ -2623,7 +2624,7 @@ SDValue MipsTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG,
   MVT VT = Subtarget.isGP64bit() ? MVT::i64 : MVT::i32;
 
   // if shamt < (VT.bits):
-  //  lo = (or (shl (shl hi, 1), ~shamt) (srl lo, shamt))
+  //  lo = (or (shl (shl hi, 1), (VT.bits-1) ^ shamt) (srl lo, shamt))
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RKSimon wrote:

consistent style: (xor (VT.bits-1), shamt)

https://github.com/llvm/llvm-project/pull/71149