[llvm] [NFC][RISCV] Add `SiFive` prefix for XSfvfnrclipxfqf description (PR #71141)

via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 2 21:47:12 PDT 2023


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Shao-Ce SUN (sunshaoce)

<details>
<summary>Changes</summary>

`'XSfvfnrclipxfqf' (FP32-to-int8 Ranged Clip Instructions)` -> `'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)`

---
Full diff: https://github.com/llvm/llvm-project/pull/71141.diff


1 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+2-2) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 1bcf190a583de18..f078ffd58e5e5e0 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -846,11 +846,11 @@ def HasVendorXSfvfwmaccqqq : Predicate<"Subtarget->hasVendorXSfvfwmaccqqq()">,
 
 def FeatureVendorXSfvfnrclipxfqf
     : SubtargetFeature<"xsfvfnrclipxfqf", "HasVendorXSfvfnrclipxfqf", "true",
-                       "'XSfvfnrclipxfqf' (FP32-to-int8 Ranged Clip Instructions)",
+                       "'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)",
                        [FeatureStdExtZve32f]>;
 def HasVendorXSfvfnrclipxfqf : Predicate<"Subtarget->hasVendorXSfvfnrclipxfqf()">,
                                AssemblerPredicate<(all_of FeatureVendorXSfvfnrclipxfqf),
-                               "'XSfvfnrclipxfqf' (FP32-to-int8 Ranged Clip Instructions)">;
+                               "'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)">;
 
 def FeatureVendorXCVbitmanip
     : SubtargetFeature<"xcvbitmanip", "HasVendorXCVbitmanip", "true",

``````````

</details>


https://github.com/llvm/llvm-project/pull/71141


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