[llvm] [RISCV] CSE by swapping conditional branches (PR #71111)

Min-Yih Hsu via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 2 14:48:36 PDT 2023

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mshockwave wrote:

> Can you mention the InstCombine/DAGCombine canonicalizations in the description to help motivate this change.

It's done now.

https://github.com/llvm/llvm-project/pull/71111

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