[llvm] d62c6ad - Fix more RISCV GISel tests using -march instead of -mtriple

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2023-11-02T12:42:00-07:00
New Revision: d62c6ad2b0b93c6e8017b9f1b0f6b64e3148fb6b

URL: https://github.com/llvm/llvm-project/commit/d62c6ad2b0b93c6e8017b9f1b0f6b64e3148fb6b
DIFF: https://github.com/llvm/llvm-project/commit/d62c6ad2b0b93c6e8017b9f1b0f6b64e3148fb6b.diff

LOG: Fix more RISCV GISel tests using -march instead of -mtriple

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv32.mir
    llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv64.mir

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv32.mir
index 9a56020006b09c3..a8ec01e47e7f994 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv32.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=riscv32 -run-pass=instruction-select -simplify-mir \
+# RUN: llc -mtriple=riscv32 -run-pass=instruction-select -simplify-mir \
 # RUN: -verify-machineinstrs %s -o - | FileCheck %s
 
 ---

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv64.mir
index 4f8259e69553602..7cf6b9adc593614 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/int-ptr-cast-rv64.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=riscv64 -run-pass=instruction-select -simplify-mir \
+# RUN: llc -mtriple=riscv64 -run-pass=instruction-select -simplify-mir \
 # RUN: -verify-machineinstrs %s -o - | FileCheck %s
 
 ---