[llvm] [GISel] Make target's PartMapping, ValueMapping, and BankIDToCopyMapIdx arrays const. (PR #71079)

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git-clang-format --diff 7d039effc4930be9240446a4241d268a39960e0b e012e48e3dc55605f9161be67bb3d45cab0cf911 -- llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp llvm/lib/Target/M68k/GISel/M68kRegisterBankInfo.cpp llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
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diff --git a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
index b38ca3f09..440611c70 100644
--- a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
@@ -32,12 +32,10 @@ enum PartialMappingIdx {
   PMI_Min = PMI_GPR,
 };
 
-const RegisterBankInfo::PartialMapping PartMappings[]{
-    {0, 32, GPRBRegBank},
-    {0, 32, FPRBRegBank},
-    {0, 64, FPRBRegBank},
-    {0, 128, FPRBRegBank}
-};
+const RegisterBankInfo::PartialMapping PartMappings[]{{0, 32, GPRBRegBank},
+                                                      {0, 32, FPRBRegBank},
+                                                      {0, 64, FPRBRegBank},
+                                                      {0, 128, FPRBRegBank}};
 
 enum ValueMappingIdx {
     InvalidIdx = 0,
@@ -65,8 +63,7 @@ const RegisterBankInfo::ValueMapping ValueMappings[] = {
     // up to 3 operands in FPRs - MSA
     {&PartMappings[PMI_MSA - PMI_Min], 1},
     {&PartMappings[PMI_MSA - PMI_Min], 1},
-    {&PartMappings[PMI_MSA - PMI_Min], 1}
-};
+    {&PartMappings[PMI_MSA - PMI_Min], 1}};
 
 } // end namespace Mips
 } // end namespace llvm

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https://github.com/llvm/llvm-project/pull/71079