[llvm] [llvm][AArch64][Assembly]: Add SME_F8F16 and SME_F8F32 Ass/Disass. (PR #70640)

via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 2 03:09:56 PDT 2023


================
@@ -0,0 +1,195 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f8f16,+sme-f8f32  2>&1 < %s | FileCheck %s
----------------
CarolineConcatto wrote:

We can replace sme2p1, by sme2

https://github.com/llvm/llvm-project/pull/70640


More information about the llvm-commits mailing list