[llvm] [AMDGPU] Select v_lshl_add_u32 instead of v_mul_lo_u32 by constant (PR #71035)

via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 2 01:16:23 PDT 2023


github-actions[bot] wrote:

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git-clang-format --diff 3bc056d5f0ebe9e4074afa088c3a0355f9ab901a e0f85f7731c5fcfe7139d9f78fc6495f50692f0b -- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index fe72628090b6..bd3d59203c41 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -4085,8 +4085,7 @@ SDValue AMDGPUTargetLowering::performMulCombine(SDNode *N,
     APInt CVal = C->getAPIntValue();
     if (isPowerOf2_32(CVal.getZExtValue() - 1)) {
       unsigned int Sqr = Log2_32(CVal.getZExtValue() - 1);
-      SDValue Pow2Constant =
-          DAG.getConstant(Sqr, DL, N1.getValueType());
+      SDValue Pow2Constant = DAG.getConstant(Sqr, DL, N1.getValueType());
       SDValue Shl = DAG.getNode(ISD::SHL, DL, VT, N0, Pow2Constant);
       return DAG.getNode(ISD::ADD, DL, VT, Shl, N0);
     }

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https://github.com/llvm/llvm-project/pull/71035


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