[llvm] [AArch64][GlobalISel] Support udot lowering for vecreduce add (PR #70784)

[David Green via llvm-commits]

https://github.com/davemgreen commented:

The test look good to me, if you wanted to push those separately and didn't want to add some more. It might be worth making sure there are tests for 24x vector types and 48x vector types, if there are not already.

https://github.com/llvm/llvm-project/pull/70784