[llvm] [AMDGPU] Folding imm offset in more cases for scratch access (PR #70634)

[Jay Foad via llvm-commits]

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@@ -1146,10 +1146,23 @@ bool AMDGPUDAGToDAGISel::isDSOffset2Legal(SDValue Base, unsigned Offset0,
   return CurDAG->SignBitIsZero(Base);
 }
 
-bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegal(SDValue Base,
+bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegal(SDValue Addr, SDValue Base,
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jayfoad wrote:

OK, I see. I think this patch is probably OK as-is but the code that it touches could really benefit from some refactoring. For example isFlatScratchBaseLegal no longer just checks the "base" part of the address, and it has to look for ADD nodes that have already been discovered by its callers. In the case of SGPR+VGPR+offset addressing, we could check that both ADDs have the nuw flag set.

Maybe `selectScratchOffset`, `selectScratchSAddr` and `selectScratchSVAddr` could be combined into one function with flags saying whether it should match saddr or vaddr or both.

https://github.com/llvm/llvm-project/pull/70634