[llvm] 157ba33 - [CSKY,test] Update switch.ll

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 31 15:47:22 PDT 2023


Author: Fangrui Song
Date: 2023-10-31T15:47:05-07:00
New Revision: 157ba33007fe2fd0609c87b7e9c8615ba427740f

URL: https://github.com/llvm/llvm-project/commit/157ba33007fe2fd0609c87b7e9c8615ba427740f
DIFF: https://github.com/llvm/llvm-project/commit/157ba33007fe2fd0609c87b7e9c8615ba427740f.diff

LOG: [CSKY,test] Update switch.ll

Added: 
    

Modified: 
    llvm/test/CodeGen/CSKY/switch.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/CSKY/switch.ll b/llvm/test/CodeGen/CSKY/switch.ll
index 515ccd4960dc0bc..dce857964042834 100644
--- a/llvm/test/CodeGen/CSKY/switch.ll
+++ b/llvm/test/CodeGen/CSKY/switch.ll
@@ -8,7 +8,7 @@ define i32 @f(i32 %val) {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movi16 a1, 4
 ; CHECK-NEXT:    cmphs16 a1, a0
-; CHECK-NEXT:    bf32 .LBB0_3
+; CHECK-NEXT:    bf32 .LBB0_7
 ; CHECK-NEXT:  # %bb.1: # %entry
 ; CHECK-NEXT:    lrw32 a1, [.LCPI0_0]
 ; CHECK-NEXT:    ldr32.w a0, (a1, a0 << 2)
@@ -16,25 +16,25 @@ define i32 @f(i32 %val) {
 ; CHECK-NEXT:  .LBB0_2: # %onzero
 ; CHECK-NEXT:    movi16 a0, 0
 ; CHECK-NEXT:    rts16
-; CHECK-NEXT:  .LBB0_3: # %otherwise
-; CHECK-NEXT:    movih32 a0, 65535
-; CHECK-NEXT:    ori32 a0, a0, 65535
-; CHECK-NEXT:    rts16
-; CHECK-NEXT:  .LBB0_4: # %onone
-; CHECK-NEXT:    movi16 a0, 1
+; CHECK-NEXT:  .LBB0_3: # %onthree
+; CHECK-NEXT:    movi16 a0, 3
 ; CHECK-NEXT:    rts16
-; CHECK-NEXT:  .LBB0_5: # %ontwo
+; CHECK-NEXT:  .LBB0_4: # %ontwo
 ; CHECK-NEXT:    movi16 a0, 2
 ; CHECK-NEXT:    rts16
-; CHECK-NEXT:  .LBB0_6: # %onfour
+; CHECK-NEXT:  .LBB0_5: # %onfour
 ; CHECK-NEXT:    movi16 a0, 4
 ; CHECK-NEXT:    rts16
-; CHECK-NEXT:  .LBB0_7: # %onthree
-; CHECK-NEXT:    movi16 a0, 3
+; CHECK-NEXT:  .LBB0_6: # %onone
+; CHECK-NEXT:    movi16 a0, 1
+; CHECK-NEXT:    rts16
+; CHECK-NEXT:  .LBB0_7: # %otherwise
+; CHECK-NEXT:    movih32 a0, 65535
+; CHECK-NEXT:    ori32 a0, a0, 65535
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:    .p2align 1
 ; CHECK-NEXT:  # %bb.8:
-; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:    .p2align 2, 0x0
 ; CHECK-NEXT:  .LCPI0_0:
 ; CHECK-NEXT:    .long .LJTI0_0
 ;
@@ -48,7 +48,7 @@ define i32 @f(i32 %val) {
 ; CHECK-PIC-SMALL-NEXT:    lrw32 rgb, [.LCPI0_0]
 ; CHECK-PIC-SMALL-NEXT:    movi16 a1, 4
 ; CHECK-PIC-SMALL-NEXT:    cmphs16 a1, a0
-; CHECK-PIC-SMALL-NEXT:    bf32 .LBB0_3
+; CHECK-PIC-SMALL-NEXT:    bf32 .LBB0_7
 ; CHECK-PIC-SMALL-NEXT:  # %bb.1: # %entry
 ; CHECK-PIC-SMALL-NEXT:    lrw32 a1, [.LCPI0_1]
 ; CHECK-PIC-SMALL-NEXT:    addu32 a1, rgb, a1
@@ -58,28 +58,28 @@ define i32 @f(i32 %val) {
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_2: # %onzero
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 0
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
-; CHECK-PIC-SMALL-NEXT:  .LBB0_3: # %otherwise
-; CHECK-PIC-SMALL-NEXT:    movih32 a0, 65535
-; CHECK-PIC-SMALL-NEXT:    ori32 a0, a0, 65535
-; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
-; CHECK-PIC-SMALL-NEXT:  .LBB0_4: # %onone
-; CHECK-PIC-SMALL-NEXT:    movi16 a0, 1
+; CHECK-PIC-SMALL-NEXT:  .LBB0_3: # %onthree
+; CHECK-PIC-SMALL-NEXT:    movi16 a0, 3
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
-; CHECK-PIC-SMALL-NEXT:  .LBB0_5: # %ontwo
+; CHECK-PIC-SMALL-NEXT:  .LBB0_4: # %ontwo
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 2
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
-; CHECK-PIC-SMALL-NEXT:  .LBB0_6: # %onfour
+; CHECK-PIC-SMALL-NEXT:  .LBB0_5: # %onfour
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 4
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
-; CHECK-PIC-SMALL-NEXT:  .LBB0_7: # %onthree
-; CHECK-PIC-SMALL-NEXT:    movi16 a0, 3
+; CHECK-PIC-SMALL-NEXT:  .LBB0_6: # %onone
+; CHECK-PIC-SMALL-NEXT:    movi16 a0, 1
+; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
+; CHECK-PIC-SMALL-NEXT:  .LBB0_7: # %otherwise
+; CHECK-PIC-SMALL-NEXT:    movih32 a0, 65535
+; CHECK-PIC-SMALL-NEXT:    ori32 a0, a0, 65535
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_8: # %onone
 ; CHECK-PIC-SMALL-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
 ; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 4
 ; CHECK-PIC-SMALL-NEXT:    rts16
 ; CHECK-PIC-SMALL-NEXT:    .p2align 1
 ; CHECK-PIC-SMALL-NEXT:  # %bb.9:
-; CHECK-PIC-SMALL-NEXT:    .p2align 2
+; CHECK-PIC-SMALL-NEXT:    .p2align 2, 0x0
 ; CHECK-PIC-SMALL-NEXT:  .LCPI0_0:
 ; CHECK-PIC-SMALL-NEXT:    .long _GLOBAL_OFFSET_TABLE_
 ; CHECK-PIC-SMALL-NEXT:  .LCPI0_1:
@@ -95,7 +95,7 @@ define i32 @f(i32 %val) {
 ; CHECK-PIC-LARGE-NEXT:    lrw32 rgb, [.LCPI0_0]
 ; CHECK-PIC-LARGE-NEXT:    movi16 a1, 4
 ; CHECK-PIC-LARGE-NEXT:    cmphs16 a1, a0
-; CHECK-PIC-LARGE-NEXT:    bf32 .LBB0_3
+; CHECK-PIC-LARGE-NEXT:    bf32 .LBB0_7
 ; CHECK-PIC-LARGE-NEXT:  # %bb.1: # %entry
 ; CHECK-PIC-LARGE-NEXT:    lrw32 a1, [.LCPI0_1]
 ; CHECK-PIC-LARGE-NEXT:    addu32 a1, rgb, a1
@@ -105,28 +105,28 @@ define i32 @f(i32 %val) {
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_2: # %onzero
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 0
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
-; CHECK-PIC-LARGE-NEXT:  .LBB0_3: # %otherwise
-; CHECK-PIC-LARGE-NEXT:    movih32 a0, 65535
-; CHECK-PIC-LARGE-NEXT:    ori32 a0, a0, 65535
-; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
-; CHECK-PIC-LARGE-NEXT:  .LBB0_4: # %onone
-; CHECK-PIC-LARGE-NEXT:    movi16 a0, 1
+; CHECK-PIC-LARGE-NEXT:  .LBB0_3: # %onthree
+; CHECK-PIC-LARGE-NEXT:    movi16 a0, 3
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
-; CHECK-PIC-LARGE-NEXT:  .LBB0_5: # %ontwo
+; CHECK-PIC-LARGE-NEXT:  .LBB0_4: # %ontwo
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 2
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
-; CHECK-PIC-LARGE-NEXT:  .LBB0_6: # %onfour
+; CHECK-PIC-LARGE-NEXT:  .LBB0_5: # %onfour
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 4
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
-; CHECK-PIC-LARGE-NEXT:  .LBB0_7: # %onthree
-; CHECK-PIC-LARGE-NEXT:    movi16 a0, 3
+; CHECK-PIC-LARGE-NEXT:  .LBB0_6: # %onone
+; CHECK-PIC-LARGE-NEXT:    movi16 a0, 1
+; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
+; CHECK-PIC-LARGE-NEXT:  .LBB0_7: # %otherwise
+; CHECK-PIC-LARGE-NEXT:    movih32 a0, 65535
+; CHECK-PIC-LARGE-NEXT:    ori32 a0, a0, 65535
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_8: # %onone
 ; CHECK-PIC-LARGE-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
 ; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 4
 ; CHECK-PIC-LARGE-NEXT:    rts16
 ; CHECK-PIC-LARGE-NEXT:    .p2align 1
 ; CHECK-PIC-LARGE-NEXT:  # %bb.9:
-; CHECK-PIC-LARGE-NEXT:    .p2align 2
+; CHECK-PIC-LARGE-NEXT:    .p2align 2, 0x0
 ; CHECK-PIC-LARGE-NEXT:  .LCPI0_0:
 ; CHECK-PIC-LARGE-NEXT:    .long _GLOBAL_OFFSET_TABLE_
 ; CHECK-PIC-LARGE-NEXT:  .LCPI0_1:


        


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