[llvm] [X86InstrInfo] support memfold on spillable inline asm (PR #70832)
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Tue Oct 31 10:25:04 PDT 2023
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git-clang-format --diff c7040509299542f8986448fa47abc0f3da75f661 89dbc57fe61dc90ebe116294644443d0f9578a51 -- llvm/include/llvm/CodeGen/MachineInstr.h llvm/include/llvm/CodeGen/TargetInstrInfo.h llvm/include/llvm/IR/InlineAsm.h llvm/lib/CodeGen/CalcSpillWeights.cpp llvm/lib/CodeGen/MachineInstr.cpp llvm/lib/CodeGen/TargetInstrInfo.cpp llvm/lib/Target/X86/X86InstrInfo.cpp llvm/lib/Target/X86/X86InstrInfo.h
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View the diff from clang-format here.
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diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index ba98f52c27bb..38fd589aa55d 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -2189,8 +2189,8 @@ public:
/// Fills in the necessary MachineOperands to refer to a frame index.
/// The best way to understand this is to print `asm(""::"m"(x));` after
/// finalize-isel. Example:
- /// INLINEASM ... 262190 /* mem:m */, %stack.0.x.addr, 1, $noreg, 0, $noreg ...
- /// we would add placeholders for: ^ ^ ^ ^
+ /// INLINEASM ... 262190 /* mem:m */, %stack.0.x.addr, 1, $noreg, 0, $noreg
+ /// ... we would add placeholders for: ^ ^ ^ ^
virtual void
getFrameIndexOperands(SmallVectorImpl<MachineOperand> &Ops) const {
llvm_unreachable("unknown number of operands necessary");
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 2e17cd8ac88f..9e254a2a79d0 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -10334,12 +10334,13 @@ void X86InstrInfo::genAlternativeCodeSequence(
}
// See also: X86DAGToDAGISel::SelectInlineAsmMemoryOperand().
-void X86InstrInfo::getFrameIndexOperands(SmallVectorImpl<MachineOperand> &Ops) const {
+void X86InstrInfo::getFrameIndexOperands(
+ SmallVectorImpl<MachineOperand> &Ops) const {
Ops.append({
- MachineOperand::CreateImm(1), // Scale
- MachineOperand::CreateReg(0, false), // Index
- MachineOperand::CreateImm(0), // Disp
- MachineOperand::CreateReg(0, false), // Segment
+ MachineOperand::CreateImm(1), // Scale
+ MachineOperand::CreateReg(0, false), // Index
+ MachineOperand::CreateImm(0), // Disp
+ MachineOperand::CreateReg(0, false), // Segment
});
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index b08bc66d5b72..ca67047de0b3 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -648,7 +648,8 @@ protected:
return false;
}
- void getFrameIndexOperands(SmallVectorImpl<MachineOperand> &Ops) const override;
+ void
+ getFrameIndexOperands(SmallVectorImpl<MachineOperand> &Ops) const override;
private:
/// This is a helper for convertToThreeAddress for 8 and 16-bit instructions.
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https://github.com/llvm/llvm-project/pull/70832
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