[llvm] [CalcSpillWeights] don't mark live intervals with spillable inlineasm ops as having infinite spill weight (PR #70747)

Nick Desaulniers via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 31 08:47:16 PDT 2023


================
@@ -146,6 +146,17 @@ void VirtRegAuxInfo::calculateSpillWeightAndHint(LiveInterval &LI) {
   LI.setWeight(Weight);
 }
 
+static bool canMemFoldInlineAsm(LiveInterval &LI,
+                                const MachineRegisterInfo &MRI) {
+  for (const MachineOperand &MO : MRI.reg_operands(LI.reg())) {
+    const MachineInstr *MI = MO.getParent();
+    if (MI->isInlineAsm() && MI->mayFoldInlineAsmMemOp(MI->getOperandNo(&MO)))
+      return true;
----------------
nickdesaulniers wrote:

> What happens if a register is both foldable and not foldable?
> I.e., something like asm "rm, r", %0, %0.

I'm not sure that can be expressed from inline asm.

Do you mean something like:
```c
asm ("# %0 %1"::"rm"(x), "r"(x));
```
?

I /that/ case, `%0` would have a distinct storage location from `%1`. `x` would be copied into the inline asm twice.  `%0`'s constraint is `rm` (register /OR/ memory), `%1`'s constraint is `r` (register).  I don't think AND NOT is expressible via the constraint language.

https://github.com/llvm/llvm-project/pull/70747


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