[llvm] 0b3f6ff - [RISCV] Disable hasAllNBitUsers for vector types.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sun Oct 22 22:04:00 PDT 2023


Author: Craig Topper
Date: 2023-10-22T21:59:31-07:00
New Revision: 0b3f6ff3c4ef340d08209665acfe0bbb3392596b

URL: https://github.com/llvm/llvm-project/commit/0b3f6ff3c4ef340d08209665acfe0bbb3392596b
DIFF: https://github.com/llvm/llvm-project/commit/0b3f6ff3c4ef340d08209665acfe0bbb3392596b.diff

LOG: [RISCV] Disable hasAllNBitUsers for vector types.

RISCVGenDAGISel.inc can call this before it checks the node type.
Ensure the type is scalar before wasting time to do the more
computationally expensive checks.

This also avoids an assertion if we hit a VMV_X_S instruction
which doesn't have a VL operand which vectorPseudoHasAllNBitUsers
expects.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 8042f665d816a8b..1b067557b2f9554 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -2878,6 +2878,11 @@ bool RISCVDAGToDAGISel::hasAllNBitUsers(SDNode *Node, unsigned Bits,
   if (Depth >= SelectionDAG::MaxRecursionDepth)
     return false;
 
+  // The PatFrags that call this may run before RISCVGenDAGISel.inc has checked
+  // the VT. Ensure the type is scalar to avoid wasting time on vectors.
+  if (!Node->getValueType(0).isScalarInteger())
+    return false;
+
   for (auto UI = Node->use_begin(), UE = Node->use_end(); UI != UE; ++UI) {
     SDNode *User = *UI;
     // Users of this node should have already been instruction selected


        


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