[llvm] instcombine (PR #69882)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 22 08:11:23 PDT 2023
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: None (elhewaty)
<details>
<summary>Changes</summary>
- [InstCombine] Add test coverage for comparisons of operands including one-complemented oparands(NFC).
- [InstCombine] Fold xored one-complemented operand comparisons.
---
Full diff: https://github.com/llvm/llvm-project/pull/69882.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp (+29)
- (modified) llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll (+112)
``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 66e2b6c72cce46c..4c19edfb27d2f2b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -6929,6 +6929,23 @@ static Instruction *foldReductionIdiom(ICmpInst &I,
return nullptr;
}
+// Gets the inverse of the predicate, but not the full predicate,
+// it doesn't change the equality, e.g SLE <-> SGE, SLT <-> SGT,
+// ULE <-> UGE, ULT <-> UGT
+static ICmpInst::Predicate ConvertPred(ICmpInst::Predicate Pred) {
+ switch(Pred) {
+ case ICmpInst::ICMP_SLE: return ICmpInst::ICMP_SGE;
+ case ICmpInst::ICMP_SGE: return ICmpInst::ICMP_SLE;
+ case ICmpInst::ICMP_SLT: return ICmpInst::ICMP_SGT;
+ case ICmpInst::ICMP_SGT: return ICmpInst::ICMP_SLT;
+ case ICmpInst::ICMP_ULE: return ICmpInst::ICMP_UGE;
+ case ICmpInst::ICMP_UGE: return ICmpInst::ICMP_ULE;
+ case ICmpInst::ICMP_ULT: return ICmpInst::ICMP_UGT;
+ case ICmpInst::ICMP_UGT: return ICmpInst::ICMP_ULT;
+ default: llvm_unreachable("Invalid Predicate");
+ }
+}
+
Instruction *InstCombinerImpl::visitICmpInst(ICmpInst &I) {
bool Changed = false;
const SimplifyQuery Q = SQ.getWithInstruction(&I);
@@ -7127,6 +7144,18 @@ Instruction *InstCombinerImpl::visitICmpInst(ICmpInst &I) {
return new ICmpInst(I.getInversePredicate(), Builder.CreateAnd(A, B),
Op1);
+ // Transform (~A ^ B) s< ~A --> (A ^ B) s> A,
+ // (~A ^ B) s> ~A --> (A ^ B) s< A,
+ // (~A ^ B) s<= ~A --> (A ^ B) s>= A,
+ // (~A ^ B) s>= ~A --> (A ^ B) s<= A,
+ // (~A ^ B) u< ~A --> (A ^ B) u< A,
+ // (~A ^ B) u> ~A --> (A ^ B) u< A,
+ // (~A ^ B) u<= ~A --> (A ^ B) u>= A,
+ // and (~A ^ B) u>= ~A --> (A ^ B) <= A
+ if (match(Op0, m_Xor(m_Not(m_Value(A)), m_Value(B))) &&
+ match(Op1, m_Not(m_Value(A))) && !I.isEquality())
+ return new ICmpInst(ConvertPred(Pred), Builder.CreateXor(A, B), A);
+
// ~X < ~Y --> Y < X
// ~X < C --> X > ~C
if (match(Op0, m_Not(m_Value(A)))) {
diff --git a/llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll b/llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll
index 9b6572697cf5e8f..893fb868e6adc77 100644
--- a/llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-of-xor-x.ll
@@ -4,6 +4,118 @@
declare void @llvm.assume(i1)
declare void @barrier()
+define i32 @test_slt_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_slt_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp slt i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
+define i32 @test_sle_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_sle_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp sge i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp sle i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
+define i32 @test_sgt_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_sgt_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp sgt i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
+define i32 @test_sge_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_sge_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp sle i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp sge i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
+define i32 @test_ult_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_ult_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp ult i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
+define i32 @test_ule_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_ule_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp uge i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp ule i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
+define i32 @test_ugt_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_ugt_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp ugt i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
+define i32 @test_uge_xor(i32 %0, i32 %1) {
+; CHECK-LABEL: @test_uge_xor(
+; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ule i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT: ret i32 [[TMP5]]
+;
+ %3 = xor i32 %0, -1
+ %4 = xor i32 %3, %1
+ %5 = icmp uge i32 %4, %3
+ %6 = zext i1 %5 to i32
+ ret i32 %6
+}
+
define i1 @xor_uge(i8 %x, i8 %y) {
; CHECK-LABEL: @xor_uge(
; CHECK-NEXT: [[YNZ:%.*]] = icmp ne i8 [[Y:%.*]], 0
``````````
</details>
https://github.com/llvm/llvm-project/pull/69882
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