[llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 22 06:25:56 PDT 2023
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-ir
Author: None (paperchalice)
<details>
<summary>Changes</summary>
Just steal patches shamefully from [D83612](https://reviews.llvm.org/D83612) and [D83613](https://reviews.llvm.org/D83612), migrate them to the latest llvm. If it is not the time to land this, feel free to close it.
---
Patch is 96.69 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/69879.diff
23 Files Affected:
- (modified) llvm/include/llvm/CodeGen/CodeGenPassBuilder.h (+40-29)
- (modified) llvm/include/llvm/CodeGen/MachinePassRegistry.def (+2)
- (modified) llvm/include/llvm/CodeGen/TargetPassConfig.h (+3-1)
- (modified) llvm/include/llvm/IR/PassInstrumentation.h (+39)
- (modified) llvm/include/llvm/Target/TargetMachine.h (+19-21)
- (modified) llvm/lib/CodeGen/TargetPassConfig.cpp (+99-74)
- (modified) llvm/lib/Passes/StandardInstrumentations.cpp (+79-80)
- (modified) llvm/lib/Target/TargetLoweringObjectFile.cpp (+1)
- (modified) llvm/lib/Target/TargetMachine.cpp (+1)
- (modified) llvm/lib/Target/TargetMachineC.cpp (+1)
- (modified) llvm/lib/Target/X86/CMakeLists.txt (+2)
- (added) llvm/lib/Target/X86/X86PassRegistry.def (+69)
- (modified) llvm/lib/Target/X86/X86TargetMachine.cpp (+287-6)
- (modified) llvm/lib/Target/X86/X86TargetMachine.h (+13)
- (modified) llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll (+2)
- (added) llvm/test/CodeGen/Generic/new-pm/llc-start-stop.ll (+47)
- (added) llvm/test/CodeGen/X86/new-pm/O0-pipeline.ll (+68)
- (added) llvm/test/CodeGen/X86/new-pm/llc-start-stop-instance.ll (+35)
- (added) llvm/test/CodeGen/X86/new-pm/opt-pipeline.ll (+147)
- (modified) llvm/tools/llc/CMakeLists.txt (+3)
- (added) llvm/tools/llc/NewPMDriver.cpp (+259)
- (added) llvm/tools/llc/NewPMDriver.h (+49)
- (modified) llvm/tools/llc/llc.cpp (+34-56)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
index d7739e8bb597e4e..8c38b3eed110806 100644
--- a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
@@ -90,7 +90,7 @@ namespace llvm {
} \
static AnalysisKey Key; \
};
-#include "MachinePassRegistry.def"
+#include "llvm/CodeGen/MachinePassRegistry.def"
/// This class provides access to building LLVM's passes.
///
@@ -118,9 +118,15 @@ template <typename DerivedT> class CodeGenPassBuilder {
Opt.OptimizeRegAlloc = getOptLevel() != CodeGenOptLevel::None;
}
- Error buildPipeline(ModulePassManager &MPM, MachineFunctionPassManager &MFPM,
- raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
- CodeGenFileType FileType) const;
+ Expected<std::pair<ModulePassManager, MachineFunctionPassManager>>
+ buildPipeline(raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
+ CodeGenFileType FileType) const;
+
+ Expected<MachineFunctionPassManager>
+ parseMIRPipeline(StringRef) const {
+ // TODO: parse pipeline text
+ return MachineFunctionPassManager();
+ }
void registerModuleAnalyses(ModuleAnalysisManager &) const;
void registerFunctionAnalyses(FunctionAnalysisManager &) const;
@@ -195,7 +201,9 @@ template <typename DerivedT> class CodeGenPassBuilder {
// Function object to maintain state while adding codegen machine passes.
class AddMachinePass {
public:
- AddMachinePass(MachineFunctionPassManager &PM) : PM(PM) {}
+ AddMachinePass(const CodeGenPassBuilder &Builder,
+ MachineFunctionPassManager &PM)
+ : Builder(Builder), PM(PM) {}
template <typename PassT> void operator()(PassT &&Pass) {
static_assert(
@@ -225,6 +233,7 @@ template <typename DerivedT> class CodeGenPassBuilder {
MachineFunctionPassManager releasePM() { return std::move(PM); }
private:
+ const CodeGenPassBuilder &Builder;
MachineFunctionPassManager &PM;
SmallVector<llvm::unique_function<bool(AnalysisKey *)>, 4> BeforeCallbacks;
SmallVector<llvm::unique_function<void(AnalysisKey *)>, 4> AfterCallbacks;
@@ -238,9 +247,6 @@ template <typename DerivedT> class CodeGenPassBuilder {
void registerTargetAnalysis(ModuleAnalysisManager &) const {}
void registerTargetAnalysis(FunctionAnalysisManager &) const {}
void registerTargetAnalysis(MachineFunctionAnalysisManager &) const {}
- std::pair<StringRef, bool> getTargetPassNameFromLegacyName(StringRef) const {
- return {"", false};
- }
template <typename TMC> TMC &getTM() const { return static_cast<TMC &>(TM); }
CodeGenOptLevel getOptLevel() const { return TM.getOptLevel(); }
@@ -458,27 +464,32 @@ template <typename DerivedT> class CodeGenPassBuilder {
};
template <typename Derived>
-Error CodeGenPassBuilder<Derived>::buildPipeline(
- ModulePassManager &MPM, MachineFunctionPassManager &MFPM,
- raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
- CodeGenFileType FileType) const {
- AddIRPass addIRPass(MPM, Opt.DebugPM);
- addISelPasses(addIRPass);
-
- AddMachinePass addPass(MFPM);
- if (auto Err = addCoreISelPasses(addPass))
- return std::move(Err);
+Expected<std::pair<ModulePassManager, MachineFunctionPassManager>>
+CodeGenPassBuilder<Derived>::buildPipeline(raw_pwrite_stream &Out,
+ raw_pwrite_stream *DwoOut,
+ CodeGenFileType FileType) const {
+ ModulePassManager MPM;
+ MachineFunctionPassManager MFPM;
+ {
+ AddIRPass addIRPass(MPM, Opt.DebugPM);
+ addISelPasses(addIRPass);
+
+ AddMachinePass addPass(*this, MFPM);
+ if (auto Err = addCoreISelPasses(addPass))
+ return std::move(Err);
- if (auto Err = derived().addMachinePasses(addPass))
- return std::move(Err);
+ if (auto Err = derived().addMachinePasses(addPass))
+ return std::move(Err);
- derived().addAsmPrinter(
- addPass, [this, &Out, DwoOut, FileType](MCContext &Ctx) {
- return this->TM.createMCStreamer(Out, DwoOut, FileType, Ctx);
- });
+ derived().addAsmPrinter(
+ addPass, [this, &Out, DwoOut, FileType](MCContext &Ctx) {
+ return this->TM.createMCStreamer(Out, DwoOut, FileType, Ctx);
+ });
- addPass(FreeMachineFunctionPass());
- return Error::success();
+ addPass(FreeMachineFunctionPass());
+ }
+
+ return std::pair(std::move(MPM), std::move(MFPM));
}
static inline AAManager registerAAAnalyses() {
@@ -503,7 +514,7 @@ void CodeGenPassBuilder<Derived>::registerModuleAnalyses(
ModuleAnalysisManager &MAM) const {
#define MODULE_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR) \
MAM.registerPass([&] { return PASS_NAME CONSTRUCTOR; });
-#include "MachinePassRegistry.def"
+#include "llvm/CodeGen/MachinePassRegistry.def"
derived().registerTargetAnalysis(MAM);
}
@@ -514,7 +525,7 @@ void CodeGenPassBuilder<Derived>::registerFunctionAnalyses(
#define FUNCTION_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR) \
FAM.registerPass([&] { return PASS_NAME CONSTRUCTOR; });
-#include "MachinePassRegistry.def"
+#include "llvm/CodeGen/MachinePassRegistry.def"
derived().registerTargetAnalysis(FAM);
}
@@ -523,7 +534,7 @@ void CodeGenPassBuilder<Derived>::registerMachineFunctionAnalyses(
MachineFunctionAnalysisManager &MFAM) const {
#define MACHINE_FUNCTION_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR) \
MFAM.registerPass([&] { return PASS_NAME CONSTRUCTOR; });
-#include "MachinePassRegistry.def"
+#include "llvm/CodeGen/MachinePassRegistry.def"
derived().registerTargetAnalysis(MFAM);
}
diff --git a/llvm/include/llvm/CodeGen/MachinePassRegistry.def b/llvm/include/llvm/CodeGen/MachinePassRegistry.def
index a29269644ea1dc0..5395c2c7b4ca36e 100644
--- a/llvm/include/llvm/CodeGen/MachinePassRegistry.def
+++ b/llvm/include/llvm/CodeGen/MachinePassRegistry.def
@@ -136,6 +136,7 @@ DUMMY_MODULE_PASS("lower-emutls", LowerEmuTLSPass, ())
#define DUMMY_MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
DUMMY_MACHINE_MODULE_PASS("machine-outliner", MachineOutlinerPass, ())
+DUMMY_MACHINE_MODULE_PASS("pseudo-probe-inserter", PseudoProbeInserterPass, ())
#undef DUMMY_MACHINE_MODULE_PASS
#ifndef DUMMY_MACHINE_FUNCTION_PASS
@@ -208,4 +209,5 @@ DUMMY_MACHINE_FUNCTION_PASS("print-machine-cycles", MachineCycleInfoPrinterPass,
DUMMY_MACHINE_FUNCTION_PASS("machine-sanmd", MachineSanitizerBinaryMetadata, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass, ())
DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass, ())
+DUMMY_MACHINE_FUNCTION_PASS("unpack-mi-bundles", UnpackMachineBundlesPass, (Ftor))
#undef DUMMY_MACHINE_FUNCTION_PASS
diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 66365419aa330be..a995c06a8b50085 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -14,6 +14,7 @@
#define LLVM_CODEGEN_TARGETPASSCONFIG_H
#include "llvm/Pass.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/Support/CodeGen.h"
#include <cassert>
#include <string>
@@ -167,7 +168,8 @@ class TargetPassConfig : public ImmutablePass {
static bool hasLimitedCodeGenPipeline();
/// Returns true if none of the `-stop-before` and `-stop-after` options is
- /// set.
+ /// set. If one of them is set and `StopOpt` is not null, return the specified
+ /// pass in `StopOpt`.
static bool willCompleteCodeGenPipeline();
/// If hasLimitedCodeGenPipeline is true, this method
diff --git a/llvm/include/llvm/IR/PassInstrumentation.h b/llvm/include/llvm/IR/PassInstrumentation.h
index 519a5e46b4373b7..59d3b95c72b7c8c 100644
--- a/llvm/include/llvm/IR/PassInstrumentation.h
+++ b/llvm/include/llvm/IR/PassInstrumentation.h
@@ -84,6 +84,27 @@ class PassInstrumentationCallbacks {
using AfterAnalysisFunc = void(StringRef, Any);
using AnalysisInvalidatedFunc = void(StringRef, Any);
using AnalysesClearedFunc = void(StringRef);
+ using StartStopFunc = bool(StringRef, Any);
+
+ struct CodeGenStartStopInfo {
+ StringRef Start;
+ StringRef Stop;
+
+ bool IsStopMachinePass = false;
+
+ llvm::unique_function<StartStopFunc> StartStopCallback;
+
+ bool operator()(StringRef PassID, Any IR) {
+ return StartStopCallback(PassID, IR);
+ }
+ bool isStopMachineFunctionPass() const { return IsStopMachinePass; }
+ bool willCompleteCodeGenPipeline() const {
+ return Stop.empty();
+ }
+ StringRef getStop() const {
+ return Stop;
+ }
+ };
public:
PassInstrumentationCallbacks() = default;
@@ -148,6 +169,19 @@ class PassInstrumentationCallbacks {
AnalysesClearedCallbacks.emplace_back(std::move(C));
}
+ void registerStartStopInfo(CodeGenStartStopInfo &&C) {
+ StartStopInfo = std::move(C);
+ }
+
+ bool isStartStopInfoRegistered() const {
+ return StartStopInfo.has_value();
+ }
+
+ CodeGenStartStopInfo &getStartStopInfo() {
+ assert(StartStopInfo.has_value() && "StartStopInfo is unregistered!");
+ return *StartStopInfo;
+ }
+
/// Add a class name to pass name mapping for use by pass instrumentation.
void addClassToPassName(StringRef ClassName, StringRef PassName);
/// Get the pass name for a given pass class name.
@@ -183,6 +217,8 @@ class PassInstrumentationCallbacks {
/// These are run on analyses that have been cleared.
SmallVector<llvm::unique_function<AnalysesClearedFunc>, 4>
AnalysesClearedCallbacks;
+ /// Predicate used `llc` -start-* -stop-* options.
+ std::optional<CodeGenStartStopInfo> StartStopInfo;
StringMap<std::string> ClassToPassName;
};
@@ -236,6 +272,9 @@ class PassInstrumentation {
ShouldRun &= C(Pass.name(), llvm::Any(&IR));
}
+ if (Callbacks->StartStopInfo)
+ ShouldRun &= (*Callbacks->StartStopInfo)(Pass.name(), llvm::Any(&IR));
+
if (ShouldRun) {
for (auto &C : Callbacks->BeforeNonSkippedPassCallbacks)
C(Pass.name(), llvm::Any(&IR));
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index c1d05b25ea21f8a..5bde6276ef86172 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -14,6 +14,7 @@
#define LLVM_TARGET_TARGETMACHINE_H
#include "llvm/ADT/StringRef.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Support/Allocator.h"
@@ -170,7 +171,7 @@ class TargetMachine {
/// TargetSubtargetInfo. In debug builds, it verifies that the object being
/// returned is of the correct type.
template <typename STC> const STC &getSubtarget(const Function &F) const {
- return *static_cast<const STC*>(getSubtargetImpl(F));
+ return *static_cast<const STC *>(getSubtargetImpl(F));
}
/// Create a DataLayout.
@@ -188,9 +189,7 @@ class TargetMachine {
/// Get the pointer size for this target.
///
/// This is the only time the DataLayout in the TargetMachine is used.
- unsigned getPointerSize(unsigned AS) const {
- return DL.getPointerSize(AS);
- }
+ unsigned getPointerSize(unsigned AS) const { return DL.getPointerSize(AS); }
unsigned getPointerSizeInBits(unsigned AS) const {
return DL.getPointerSizeInBits(AS);
@@ -289,15 +288,11 @@ class TargetMachine {
/// Return true if data objects should be emitted into their own section,
/// corresponds to -fdata-sections.
- bool getDataSections() const {
- return Options.DataSections;
- }
+ bool getDataSections() const { return Options.DataSections; }
/// Return true if functions should be emitted into their own section,
/// corresponding to -ffunction-sections.
- bool getFunctionSections() const {
- return Options.FunctionSections;
- }
+ bool getFunctionSections() const { return Options.FunctionSections; }
/// Return true if visibility attribute should not be emitted in XCOFF,
/// corresponding to -mignore-xcoff-visibility.
@@ -450,19 +445,24 @@ class LLVMTargetMachine : public TargetMachine {
bool DisableVerify = true,
MachineModuleInfoWrapperPass *MMIWP = nullptr) override;
- virtual Error buildCodeGenPipeline(ModulePassManager &,
- MachineFunctionPassManager &,
- MachineFunctionAnalysisManager &,
- raw_pwrite_stream &, raw_pwrite_stream *,
- CodeGenFileType, CGPassBuilderOption,
- PassInstrumentationCallbacks *) {
+ virtual Expected<std::pair<ModulePassManager, MachineFunctionPassManager>>
+ buildCodeGenPipeline(raw_pwrite_stream &, raw_pwrite_stream *,
+ CodeGenFileType, CGPassBuilderOption,
+ MachineFunctionAnalysisManager &,
+ PassInstrumentationCallbacks *) {
return make_error<StringError>("buildCodeGenPipeline is not overridden",
inconvertibleErrorCode());
}
virtual std::pair<StringRef, bool> getPassNameFromLegacyName(StringRef) {
- llvm_unreachable(
- "getPassNameFromLegacyName parseMIRPipeline is not overridden");
+ llvm_unreachable("getPassNameFromLegacyName is not overridden");
+ }
+
+ virtual Expected<MachineFunctionPassManager>
+ parseMIRPipeline(StringRef PipelineText, CGPassBuilderOption Opts,
+ MachineFunctionAnalysisManager &MFAM,
+ PassInstrumentationCallbacks *PIC) {
+ llvm_unreachable("parseMIRPipeline is not overridden");
}
/// Add passes to the specified pass manager to get machine code emitted with
@@ -499,9 +499,7 @@ class LLVMTargetMachine : public TargetMachine {
/// True if the target wants to use interprocedural register allocation by
/// default. The -enable-ipra flag can be used to override this.
- virtual bool useIPRA() const {
- return false;
- }
+ virtual bool useIPRA() const { return false; }
/// The default variant to use in unqualified `asm` instructions.
/// If this returns 0, `asm "$(foo$|bar$)"` will evaluate to `asm "foo"`.
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index e6ecbc9b03f7149..8591bdd3232217b 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -58,49 +58,60 @@ static cl::opt<bool>
EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
cl::desc("Enable interprocedural register allocation "
"to reduce load/store at procedure calls."));
-static cl::opt<bool> DisablePostRASched("disable-post-ra", cl::Hidden,
- cl::desc("Disable Post Regalloc Scheduler"));
+static cl::opt<bool>
+ DisablePostRASched("disable-post-ra", cl::Hidden,
+ cl::desc("Disable Post Regalloc Scheduler"));
static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,
- cl::desc("Disable branch folding"));
+ cl::desc("Disable branch folding"));
static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden,
- cl::desc("Disable tail duplication"));
-static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden,
+ cl::desc("Disable tail duplication"));
+static cl::opt<bool> DisableEarlyTailDup(
+ "disable-early-taildup", cl::Hidden,
cl::desc("Disable pre-register allocation tail duplication"));
-static cl::opt<bool> DisableBlockPlacement("disable-block-placement",
- cl::Hidden, cl::desc("Disable probability-driven block placement"));
-static cl::opt<bool> EnableBlockPlacementStats("enable-block-placement-stats",
- cl::Hidden, cl::desc("Collect probability-driven block placement stats"));
+static cl::opt<bool> DisableBlockPlacement(
+ "disable-block-placement", cl::Hidden,
+ cl::desc("Disable probability-driven block placement"));
+static cl::opt<bool> EnableBlockPlacementStats(
+ "enable-block-placement-stats", cl::Hidden,
+ cl::desc("Collect probability-driven block placement stats"));
static cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden,
- cl::desc("Disable Stack Slot Coloring"));
-static cl::opt<bool> DisableMachineDCE("disable-machine-dce", cl::Hidden,
- cl::desc("Disable Machine Dead Code Elimination"));
-static cl::opt<bool> DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden,
- cl::desc("Disable Early If-conversion"));
+ cl::desc("Disable Stack Slot Coloring"));
+static cl::opt<bool>
+ DisableMachineDCE("disable-machine-dce", cl::Hidden,
+ cl::desc("Disable Machine Dead Code Elimination"));
+static cl::opt<bool>
+ DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden,
+ cl::desc("Disable Early If-conversion"));
static cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden,
- cl::desc("Disable Machine LICM"));
-static cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden,
+ cl::desc("Disable Machine LICM"));
+static cl::opt<bool> DisableMachineCSE(
+ "disable-machine-cse", cl::Hidden,
cl::desc("Disable Machine Common Subexpression Elimination"));
static cl::opt<cl::boolOrDefault> OptimizeRegAlloc(
"optimize-regalloc", cl::Hidden,
cl::desc("Enable optimized register allocation compilation path."));
static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm",
- cl::Hidden,
- cl::desc("Disable Machine LICM"));
+ cl::Hidden,
+ cl::desc("Disable Machine LICM"));
static cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden,
- cl::desc("Disable Machine Sinking"));
-static cl::opt<bool> DisablePostRAMachineSink("disable-postra-machine-sink",
- cl::Hidden,
- cl::desc("Disable PostRA Machine Sinking"));
-static cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden,
- cl::desc("Disable Loop Strength Reduction Pass"));
-static cl::opt<bool> DisableConstantHoisting("disable-constant-hoisting",
- cl::Hidden, cl::desc("Disable ConstantHoisting"));
+ cl::desc("Disable Machine Sinking"));
+static cl::opt<bool>
+ DisablePostRAMachineSink("disable-postra-machine-sink", cl::Hidden,
+ cl::desc("Disable PostRA Machine Sinking"));
+static cl::opt<bool>
+ DisableLSR("disable-lsr", cl::Hidden,
+ cl::desc("Disable Loop Strength Reduction Pass"));
+static cl::opt<bool>
+ DisableConstantHoisting("disable-constant-hoisting", cl::Hidden,
+ cl::desc("Disable ConstantHoisting"));
static cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden,
- cl::desc("Disable Codegen Prepare"));
+ cl::desc("Disable Codegen Prepare"));
static cl::opt<bool> DisableCopyProp("disable-copyprop", cl::Hidden,
- cl::desc("Disable Copy Propagation pass"));
-static cl::opt<bool> DisablePartialLibcallInlining("disable-partial-libcall-inlining",
- cl::Hidden, cl::desc("Disable Partial Libcall Inlining"));
+ cl::desc("Disable Copy Propagation pass"));
+static cl::opt<bool>
+ DisablePartialLibcallInlining("disable-partial-libcall-inlining",
+ cl::Hidden,
+ cl::desc("Disable Partial Libcall Inlining"));
static cl::opt<bool> DisableAtExitBasedGlobalDtorLowering(
"disable-atexit-based-global-dtor-lowering", cl::Hidden,
cl::desc("For MachO, disable atexit()-based global destructor lowering"));
@@ -109,14 +120,16 @@ static cl::opt<bool> EnableImplicitNullChecks(
cl::desc("Fold null checks into faulting memory operations"),
cl::init(false), cl::Hidden);
static cl::opt<bool> DisableMergeICmps("disable-mergeicmps",
- cl::desc("Disable MergeICmps Pass"),
- cl::init(false), cl::Hidden);
-static cl::opt<bool> PrintL...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/69879
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