[llvm] 9189822 - [LVI] Handle icmp of ashr. (#68010)
via llvm-commits
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Fri Oct 20 11:16:10 PDT 2023
Author: Amara Emerson
Date: 2023-10-20T11:16:05-07:00
New Revision: 9189822f2c2eca55f6e7adcd26e3f15d65797b76
URL: https://github.com/llvm/llvm-project/commit/9189822f2c2eca55f6e7adcd26e3f15d65797b76
DIFF: https://github.com/llvm/llvm-project/commit/9189822f2c2eca55f6e7adcd26e3f15d65797b76.diff
LOG: [LVI] Handle icmp of ashr. (#68010)
This handles the case where this combine:
icmp sgt (ashr X, ShAmtC), C --> icmp sgt X, ((C + 1) << ShAmtC) - 1
wasn't performed by instcombine.
Proof of the original combine: https://alive2.llvm.org/ce/z/SfpsvX
This is a port of the review in https://reviews.llvm.org/D151911 to
GitHub.
Added:
Modified:
llvm/lib/Analysis/LazyValueInfo.cpp
llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/Analysis/LazyValueInfo.cpp b/llvm/lib/Analysis/LazyValueInfo.cpp
index 789a02ed329c909..5cb207c8036d40a 100644
--- a/llvm/lib/Analysis/LazyValueInfo.cpp
+++ b/llvm/lib/Analysis/LazyValueInfo.cpp
@@ -26,6 +26,7 @@
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Dominators.h"
+#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
@@ -1083,6 +1084,26 @@ static ValueLatticeElement getValueFromSimpleICmpCondition(
return ValueLatticeElement::getRange(TrueValues.subtract(Offset));
}
+static std::optional<ConstantRange>
+getRangeViaSLT(CmpInst::Predicate Pred, APInt RHS,
+ function_ref<std::optional<ConstantRange>(const APInt &)> Fn) {
+ bool Invert = false;
+ if (Pred == ICmpInst::ICMP_SGT || Pred == ICmpInst::ICMP_SGE) {
+ Pred = ICmpInst::getInversePredicate(Pred);
+ Invert = true;
+ }
+ if (Pred == ICmpInst::ICMP_SLE) {
+ Pred = ICmpInst::ICMP_SLT;
+ if (RHS.isMaxSignedValue())
+ return std::nullopt; // Could also return full/empty here, if we wanted.
+ ++RHS;
+ }
+ assert(Pred == ICmpInst::ICMP_SLT && "Must be signed predicate");
+ if (auto CR = Fn(RHS))
+ return Invert ? CR->inverse() : CR;
+ return std::nullopt;
+}
+
static ValueLatticeElement getValueFromICmpCondition(Value *Val, ICmpInst *ICI,
bool isTrueDest) {
Value *LHS = ICI->getOperand(0);
@@ -1148,6 +1169,25 @@ static ValueLatticeElement getValueFromICmpCondition(Value *Val, ICmpInst *ICI,
CR.getUnsignedMin().zext(BitWidth), APInt(BitWidth, 0)));
}
+ // Recognize:
+ // icmp slt (ashr X, ShAmtC), C --> icmp slt X, C << ShAmtC
+ // Preconditions: (C << ShAmtC) >> ShAmtC == C
+ const APInt *ShAmtC;
+ if (CmpInst::isSigned(EdgePred) &&
+ match(LHS, m_AShr(m_Specific(Val), m_APInt(ShAmtC))) &&
+ match(RHS, m_APInt(C))) {
+ auto CR = getRangeViaSLT(
+ EdgePred, *C, [&](const APInt &RHS) -> std::optional<ConstantRange> {
+ APInt New = RHS << *ShAmtC;
+ if ((New.ashr(*ShAmtC)) != RHS)
+ return std::nullopt;
+ return ConstantRange::getNonEmpty(
+ APInt::getSignedMinValue(New.getBitWidth()), New);
+ });
+ if (CR)
+ return ValueLatticeElement::getRange(*CR);
+ }
+
return ValueLatticeElement::getOverdefined();
}
diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll b/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
index c4f0ade39942a76..b1f4b5246b83fce 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
@@ -1240,6 +1240,110 @@ define <2 x i1> @non_const_range_minmax_vec(<2 x i8> %a, <2 x i8> %b) {
ret <2 x i1> %cmp1
}
+define void @ashr_sgt(i8 %x) {
+; CHECK-LABEL: @ashr_sgt(
+; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[S]], 1
+; CHECK-NEXT: br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]
+; CHECK: if:
+; CHECK-NEXT: call void @check1(i1 true)
+; CHECK-NEXT: [[C3:%.*]] = icmp ugt i8 [[X]], 8
+; CHECK-NEXT: call void @check1(i1 [[C3]])
+; CHECK-NEXT: ret void
+; CHECK: else:
+; CHECK-NEXT: ret void
+;
+ %s = ashr i8 %x, 2
+ %c = icmp sgt i8 %s, 1
+ br i1 %c, label %if, label %else
+if:
+ %c2 = icmp sgt i8 %x, 7
+ call void @check1(i1 %c2)
+ %c3 = icmp sgt i8 %x, 8
+ call void @check1(i1 %c3)
+ ret void
+else:
+ ret void
+}
+
+define void @ashr_sge(i8 %x) {
+; CHECK-LABEL: @ashr_sge(
+; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2
+; CHECK-NEXT: [[C:%.*]] = icmp sge i8 [[S]], 1
+; CHECK-NEXT: br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]
+; CHECK: if:
+; CHECK-NEXT: call void @check1(i1 true)
+; CHECK-NEXT: [[C3:%.*]] = icmp uge i8 [[X]], 5
+; CHECK-NEXT: call void @check1(i1 [[C3]])
+; CHECK-NEXT: ret void
+; CHECK: else:
+; CHECK-NEXT: ret void
+;
+ %s = ashr i8 %x, 2
+ %c = icmp sge i8 %s, 1
+ br i1 %c, label %if, label %else
+if:
+ %c2 = icmp sge i8 %x, 4
+ call void @check1(i1 %c2)
+ %c3 = icmp sge i8 %x, 5
+ call void @check1(i1 %c3)
+ ret void
+else:
+ ret void
+}
+
+define void @ashr_slt(i8 %x) {
+; CHECK-LABEL: @ashr_slt(
+; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2
+; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[S]], 1
+; CHECK-NEXT: br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]
+; CHECK: if:
+; CHECK-NEXT: call void @check1(i1 true)
+; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 3
+; CHECK-NEXT: call void @check1(i1 [[C3]])
+; CHECK-NEXT: ret void
+; CHECK: else:
+; CHECK-NEXT: ret void
+;
+ %s = ashr i8 %x, 2
+ %c = icmp slt i8 %s, 1
+ br i1 %c, label %if, label %else
+if:
+ %c2 = icmp slt i8 %x, 4
+ call void @check1(i1 %c2)
+ %c3 = icmp slt i8 %x, 3
+ call void @check1(i1 %c3)
+ ret void
+else:
+ ret void
+}
+
+define void @ashr_sle(i8 %x) {
+; CHECK-LABEL: @ashr_sle(
+; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2
+; CHECK-NEXT: [[C:%.*]] = icmp sle i8 [[S]], 1
+; CHECK-NEXT: br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]
+; CHECK: if:
+; CHECK-NEXT: call void @check1(i1 true)
+; CHECK-NEXT: [[C3:%.*]] = icmp sle i8 [[X]], 6
+; CHECK-NEXT: call void @check1(i1 [[C3]])
+; CHECK-NEXT: ret void
+; CHECK: else:
+; CHECK-NEXT: ret void
+;
+ %s = ashr i8 %x, 2
+ %c = icmp sle i8 %s, 1
+ br i1 %c, label %if, label %else
+if:
+ %c2 = icmp sle i8 %x, 7
+ call void @check1(i1 %c2)
+ %c3 = icmp sle i8 %x, 6
+ call void @check1(i1 %c3)
+ ret void
+else:
+ ret void
+}
+
declare i8 @llvm.umin.i8(i8, i8)
declare i8 @llvm.umax.i8(i8, i8)
declare <2 x i8> @llvm.umin.v2i8(<2 x i8>, <2 x i8>)
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