[llvm] [ARM] Add a method to clear registers (PR #69659)

via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 19 16:14:21 PDT 2023


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-arm

Author: Bill Wendling (bwendling)

<details>
<summary>Changes</summary>

This allows us to clear registers in target-independent code. The first
use will be for clearing the stack protector from registers before
returning.

---
Full diff: https://github.com/llvm/llvm-project/pull/69659.diff


2 Files Affected:

- (modified) llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp (+10) 
- (modified) llvm/lib/Target/ARM/ARMBaseInstrInfo.h (+5) 


``````````diff
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 1ffdde0360cf623..a07504aaedbc4da 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -6735,6 +6735,16 @@ MachineBasicBlock::iterator ARMBaseInstrInfo::insertOutlinedCall(
   return CallPt;
 }
 
+void ARMBaseInstrInfo::buildClearRegister(Register DstReg,
+                                          MachineBasicBlock &MBB,
+                                          MachineBasicBlock::iterator Iter,
+                                          DebugLoc &DL,
+                                          bool AllowSideEffects) const {
+  unsigned Opc = Subtarget.isThumb2() ? ARM::t2MOVi32imm : ARM::MOVi32imm;
+  BuildMI(MBB, Iter, DL, get(Opc), DstReg)
+      .addImm(0);
+}
+
 bool ARMBaseInstrInfo::shouldOutlineFromFunctionByDefault(
     MachineFunction &MF) const {
   return Subtarget.isMClass() && MF.getFunction().hasMinSize();
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index 5efcc1a0d9fc073..44b3e528c0c242e 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -363,6 +363,11 @@ class ARMBaseInstrInfo : public ARMGenInstrInfo {
                      MachineBasicBlock::iterator &It, MachineFunction &MF,
                      outliner::Candidate &C) const override;
 
+  void buildClearRegister(Register Reg, MachineBasicBlock &MBB,
+                          MachineBasicBlock::iterator Iter,
+                          DebugLoc &DL,
+                          bool AllowSideEffects = true) const override;
+
   /// Enable outlining by default at -Oz.
   bool shouldOutlineFromFunctionByDefault(MachineFunction &MF) const override;
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/69659


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