[llvm] [Peephole] Check instructions from CopyMIs are still COPY (PR #69511)

[via llvm-commits]

https://github.com/weiguozhi updated https://github.com/llvm/llvm-project/pull/69511

>From f477b08422de94b3c7569d7fa70513edf06695b9 Mon Sep 17 00:00:00 2001
From: Guozhi Wei <carrot at google.com>
Date: Wed, 18 Oct 2023 20:18:24 +0000
Subject: [PATCH 1/2] [Peephole] Check instructions from CopyMIs are still COPY

Function foldRedundantCopy records COPY instructions in CopyMIs and uses
it later. But other optimizations may delete or modify it. So before
using it we should check if the extracted instruction is existing and
still a COPY instruction.
---
 llvm/lib/CodeGen/PeepholeOptimizer.cpp |  4 +++-
 llvm/test/CodeGen/X86/peephole-copy.ll | 20 ++++++++++++++++++++
 2 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/X86/peephole-copy.ll

diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index f413ca5b04f48cf..09ae2680f5516ba 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -1445,7 +1445,9 @@ bool PeepholeOptimizer::foldRedundantCopy(
   }
 
   MachineInstr *PrevCopy = CopyMIs.find(SrcPair)->second;
-  if (!LocalMIs.count(PrevCopy))
+  // A COPY instruction can be deleted or changed by other optimizations.
+  // Check if the previous COPY instruction is existing and still a COPY.
+  if (!LocalMIs.count(PrevCopy) || !PrevCopy->isCopy())
     return false;
 
   assert(SrcSubReg == PrevCopy->getOperand(1).getSubReg() &&
diff --git a/llvm/test/CodeGen/X86/peephole-copy.ll b/llvm/test/CodeGen/X86/peephole-copy.ll
new file mode 100644
index 000000000000000..60f25a3bc7feee4
--- /dev/null
+++ b/llvm/test/CodeGen/X86/peephole-copy.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+
+; In peephole optimization the modified COPY instruction should not cause
+; compiler failure.
+
+define dso_local void @c() {
+; CHECK-LABEL: c:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl $512, %eax # imm = 0x200
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    retl
+entry:
+  tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
+  tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
+  ret void
+}

>From 3ef1cf29ce56d2dcaea82f31eb9ccd5746a6ac99 Mon Sep 17 00:00:00 2001
From: Guozhi Wei <carrot at google.com>
Date: Thu, 19 Oct 2023 20:56:07 +0000
Subject: [PATCH 2/2] Change the .ll test case to .mir. So the COPY
 instructions can be clearly seen.

---
 llvm/test/CodeGen/X86/peephole-copy.ll  | 20 ---------------
 llvm/test/CodeGen/X86/peephole-copy.mir | 34 +++++++++++++++++++++++++
 2 files changed, 34 insertions(+), 20 deletions(-)
 delete mode 100644 llvm/test/CodeGen/X86/peephole-copy.ll
 create mode 100644 llvm/test/CodeGen/X86/peephole-copy.mir

diff --git a/llvm/test/CodeGen/X86/peephole-copy.ll b/llvm/test/CodeGen/X86/peephole-copy.ll
deleted file mode 100644
index 60f25a3bc7feee4..000000000000000
--- a/llvm/test/CodeGen/X86/peephole-copy.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
-
-; In peephole optimization the modified COPY instruction should not cause
-; compiler failure.
-
-define dso_local void @c() {
-; CHECK-LABEL: c:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movl $512, %eax # imm = 0x200
-; CHECK-NEXT:    #APP
-; CHECK-NEXT:    #NO_APP
-; CHECK-NEXT:    #APP
-; CHECK-NEXT:    #NO_APP
-; CHECK-NEXT:    retl
-entry:
-  tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
-  tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
-  ret void
-}
diff --git a/llvm/test/CodeGen/X86/peephole-copy.mir b/llvm/test/CodeGen/X86/peephole-copy.mir
new file mode 100644
index 000000000000000..e875465dfc9f972
--- /dev/null
+++ b/llvm/test/CodeGen/X86/peephole-copy.mir
@@ -0,0 +1,34 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -mtriple=i686-- -run-pass=peephole-opt %s -o - | FileCheck %s
+--- |
+  define void @c() {
+  entry:
+    tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
+    tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
+    ret void
+  }
+...
+---
+# In peephole optimization the modified COPY instruction should not cause
+# compiler failure.
+name: c
+registers:
+  - { id: 0, class: gr32_abcd }
+  - { id: 1, class: gr32_abcd }
+  - { id: 2, class: gr32 }
+
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: c
+    ; CHECK: [[MOV32ri:%[0-9]+]]:gr32_abcd = MOV32ri 512
+    ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32 */, [[MOV32ri]], 1 /* reguse */, implicit-def early-clobber $df
+    ; CHECK-NEXT: [[MOV32ri1:%[0-9]+]]:gr32_abcd = MOV32ri 512
+    ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32 */, [[MOV32ri1]], 1 /* reguse */, implicit-def early-clobber $df
+    ; CHECK-NEXT: RET 0
+    %2 = MOV32ri 512
+    %0 = COPY %2
+    INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32_ABCD */, %0:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
+    %1 = COPY %2
+    INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32_ABCD */, %1:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
+    RET 0
+...