[llvm] 1be3b1e - [RISCV] Remove FrameIndex case in lui+addi MacroFusion (#68701)

[via llvm-commits]

Author: Wang Pengcheng
Date: 2023-10-19T13:32:44+08:00
New Revision: 1be3b1ef51eb62dd713b6b221c349695ad39d7a1

URL: https://github.com/llvm/llvm-project/commit/1be3b1ef51eb62dd713b6b221c349695ad39d7a1
DIFF: https://github.com/llvm/llvm-project/commit/1be3b1ef51eb62dd713b6b221c349695ad39d7a1.diff

LOG: [RISCV] Remove FrameIndex case in lui+addi MacroFusion (#68701)

If the first operand of ADDI is a frame index, then it won't have data
dependency of predecessor LUI. So it is impossible to do the DAG
mutation in these two instructions.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVMacroFusion.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
index da104657680a6b9..02a8d5c18fe1a0e 100644
--- a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
@@ -35,10 +35,6 @@ static bool isLUIADDI(const MachineInstr *FirstMI,
   if (FirstMI->getOpcode() != RISCV::LUI)
     return false;
 
-  // The first operand of ADDI might be a frame index.
-  if (!SecondMI.getOperand(1).isReg())
-    return false;
-
   Register FirstDest = FirstMI->getOperand(0).getReg();
 
   // Destination of LUI should be the ADDI(W) source register.