[llvm] 654a3a3 - [OpenCL][RISCV] Support SPIR_KERNEL calling convention (#69282)

[via llvm-commits]

Author: Wang Pengcheng
Date: 2023-10-19T11:00:39+08:00
New Revision: 654a3a3cbc1c9bbe6d3afff346d3f421a8a23384

URL: https://github.com/llvm/llvm-project/commit/654a3a3cbc1c9bbe6d3afff346d3f421a8a23384
DIFF: https://github.com/llvm/llvm-project/commit/654a3a3cbc1c9bbe6d3afff346d3f421a8a23384.diff

LOG: [OpenCL][RISCV] Support SPIR_KERNEL calling convention (#69282)

X86 supports this calling convention but I don't find any special
handling, so I think we can just handle it via CC_RISCV.

This should fix #69197.

Added: 
    llvm/test/CodeGen/RISCV/spir-kernel-cc.ll

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 63ebe8b9af320bc..a0965763e3235e4 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -17004,6 +17004,7 @@ SDValue RISCVTargetLowering::LowerFormalArguments(
     report_fatal_error("Unsupported calling convention");
   case CallingConv::C:
   case CallingConv::Fast:
+  case CallingConv::SPIR_KERNEL:
     break;
   case CallingConv::GHC:
     if (!Subtarget.hasStdExtFOrZfinx() || !Subtarget.hasStdExtDOrZdinx())

diff  --git a/llvm/test/CodeGen/RISCV/spir-kernel-cc.ll b/llvm/test/CodeGen/RISCV/spir-kernel-cc.ll
new file mode 100644
index 000000000000000..283f397373566b8
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/spir-kernel-cc.ll
@@ -0,0 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 < %s | FileCheck %s -check-prefix=RV32
+; RUN: llc -mtriple=riscv64 < %s | FileCheck %s -check-prefix=RV64
+
+; Check the SPIR_KERNEL call convention works.
+
+define dso_local spir_kernel void @foo() {
+; RV32-LABEL: foo:
+; RV32:       # %bb.0:
+; RV32-NEXT:    ret
+;
+; RV64-LABEL: foo:
+; RV64:       # %bb.0:
+; RV64-NEXT:    ret
+  ret void
+}