[llvm] fb36658 - [Memory] Call __clear_cache in InvalidateInstructionCache on LoongArch (#67285)

[via llvm-commits]

Author: Lu Weining
Date: 2023-10-19T10:16:13+08:00
New Revision: fb366581e7d67df7d9a98605fd65a7e7908451e7

URL: https://github.com/llvm/llvm-project/commit/fb366581e7d67df7d9a98605fd65a7e7908451e7
DIFF: https://github.com/llvm/llvm-project/commit/fb366581e7d67df7d9a98605fd65a7e7908451e7.diff

LOG: [Memory] Call __clear_cache in InvalidateInstructionCache on LoongArch (#67285)

As the comments of `InvalidateInstructionCache`: Before the JIT can run
a block of code that has been emitted it must invalidate the instruction
cache on some platforms. I think it applies to LoongArch as LoongArch
has a weak memory-model. But I'm not able to write a test to demonstrate
this issue. Perhaps self-modifing code should be wrote?

Added: 
    

Modified: 
    llvm/lib/Support/Unix/Memory.inc

Removed: 
    


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diff  --git a/llvm/lib/Support/Unix/Memory.inc b/llvm/lib/Support/Unix/Memory.inc
index 4c8f6b2ea7d3a09..69bd1164343da74 100644
--- a/llvm/lib/Support/Unix/Memory.inc
+++ b/llvm/lib/Support/Unix/Memory.inc
@@ -237,7 +237,8 @@ void Memory::InvalidateInstructionCache(const void *Addr, size_t Len) {
   for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
     asm volatile("icbi 0, %0" : : "r"(Line));
   asm volatile("isync");
-#elif (defined(__arm__) || defined(__aarch64__) || defined(__mips__)) &&       \
+#elif (defined(__arm__) || defined(__aarch64__) || defined(__loongarch__) ||   \
+       defined(__mips__)) &&                                                   \
     defined(__GNUC__)
   // FIXME: Can we safely always call this for __GNUC__ everywhere?
   const char *Start = static_cast<const char *>(Addr);