[llvm] [LLVM][NVPTX]Add BF16 vector instruction and fix lowering rules (PR #69415)

[Artem Belevich via llvm-commits]

================
@@ -5382,22 +5413,28 @@ static SDValue PerformSHLCombine(SDNode *N,
 }
 
 static SDValue PerformSETCCCombine(SDNode *N,
-                                   TargetLowering::DAGCombinerInfo &DCI) {
+                                   TargetLowering::DAGCombinerInfo &DCI,
+                                   unsigned int SmVersion) {
   EVT CCType = N->getValueType(0);
   SDValue A = N->getOperand(0);
   SDValue B = N->getOperand(1);
 
-  if (CCType != MVT::v2i1 || A.getValueType() != MVT::v2f16)
+  if (CCType != MVT::v2i1 ||
+      (A.getValueType() != MVT::v2f16 && A.getValueType() != MVT::v2bf16))
----------------
Artem-B wrote:

```
EVT AType = A.getValueType();
if (!(CCType == MVT::v2i1 && (AType == MVT::v2f16 || AType == MVT::v2bf16))
```

This would probably be easier to read -- we only process v2i16/v2bf16 with v2i1 CCtype.

https://github.com/llvm/llvm-project/pull/69415