[llvm] [LLVM][NVPTX]Add BF16 vector instruction and fix lowering rules (PR #69415)

[Artem Belevich via llvm-commits]

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@@ -0,0 +1,516 @@
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_80 -mattr=+ptx71 | FileCheck --check-prefixes=CHECK,SM80 %s
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Artem-B wrote:

This test may be a good candidate for using utils/update_llc_test_checks.py 


https://github.com/llvm/llvm-project/pull/69415