[llvm] [LLVM][NVPTX]Add BF16 vector instruction and fix lowering rules (PR #69415)

[Artem Belevich via llvm-commits]

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@@ -1623,8 +1623,10 @@ SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode *Node) const {
                                 SignMask);
 
   // If FABS is legal transform FCOPYSIGN(x, y) => sign(x) ? -FABS(x) : FABS(X)
+  // We don't do it in bf16 since the other path has less number of instructions
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Artem-B wrote:

I'm not sure if this is universally true. I think we should leave this code as is. Particular target may handle FNEG/FABS more effectively than logical op on an integer+casting them back and forth (e.g. BF16 may live in a different register, or there's more BF16 hardware).



https://github.com/llvm/llvm-project/pull/69415