[llvm] [X86] Support EGPR (R16-R31) for APX (PR #67702)

[Shengchen Kan via llvm-commits]

KanRobert wrote:

> Do we have no choice but to iterate over the EGPRs even for cpus that don't support them? Why does TRI::getNumRegs() always include them?

In current design, yes, we have to iterate over them. 
```
/// Initialize MCRegisterInfo, called by TableGen
/// auto-generated routines. *DO NOT USE*.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA,
                        unsigned PC, const MCRegisterClass *C, unsigned NC,
                        const MCPhysReg (*RURoots)[2], unsigned NRU,
                        const int16_t *DL, const LaneBitmask *RUMS,
                        const char *Strings, const char *ClassStrings,
                        const uint16_t *SubIndices, unsigned NumIndices,
                        const SubRegCoveredBits *SubIdxRanges,
                        const uint16_t *RET) {
  Desc = D;
  NumRegs = NR;
```
The return value of `TRI::getNumRegs()` is a constant generated by tablgen, which is same for all cpus for one target. 

https://github.com/llvm/llvm-project/pull/67702