[llvm] [mlir][sparse] implementating stageSparseOpPass as an interface (PR #69022)
Aart Bik via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 17 10:41:04 PDT 2023
================
@@ -0,0 +1,45 @@
+//===- SparseTensorInterfaces.td --------------------------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SPARSETENSOR_IR_SPARSETENSORINTERFACES
+#define SPARSETENSOR_IR_SPARSETENSORINTERFACES
+
+include "mlir/IR/OpBase.td"
+
+def StageWithSortSparseOpInterface : OpInterface<"StageWithSortSparseOp"> {
+ let description = [{
+ A stage-with-sort sparse tensor operation is an operation that produces
+ unordered intermediate output. An extra sort is required to obtain the final
+ ordered result.
+
+ E.g., convert csr -> csc need to be implemented as
+ convert csr -> unordered coo -> sort by column -> csc; and
+ concatenate csr, csc -> csr can be staged into
+ concatenate csr, csr -> unordered coo -> sort by row -> csr.
+ }];
+ let cppNamespace = "::mlir::sparse_tensor";
+ let methods = [
+ InterfaceMethod<
+ /*desc=*/"Return true if the operation needs an extra sort to produce the final result.",
+ /*retTy=*/"bool",
+ /*methodName=*/"needExtraSort",
----------------
aartbik wrote:
needsExtraSort() ?
https://github.com/llvm/llvm-project/pull/69022
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