[llvm] [OpenCL][RISCV] Support SPIR_KERNEL calling convention (PR #69282)
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Mon Oct 16 20:50:10 PDT 2023
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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git-clang-format --diff 5a6ef95a1cb5c9b537b288361b70d00043750995 85d4e9c9ff3ae09257f16a74645f8ffec9918a42 -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 16bd2564867b..ca42d808b012 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -13813,7 +13813,7 @@ static SDValue performCONCAT_VECTORSCombine(SDNode *N, SelectionDAG &DAG,
SDValue Ptr = Idx.value();
// Check that each load's pointer is (add LastPtr, Stride)
if (Ptr.getOpcode() != ISD::ADD ||
- Ptr.getOperand(0) != Ptrs[Idx.index()-1])
+ Ptr.getOperand(0) != Ptrs[Idx.index() - 1])
return SDValue();
SDValue Offset = Ptr.getOperand(1);
if (!Stride)
@@ -13831,7 +13831,7 @@ static SDValue performCONCAT_VECTORSCombine(SDNode *N, SelectionDAG &DAG,
SDValue Ptr = Idx.value();
// Check that each load's pointer is (add NextPtr, Stride)
if (Ptr.getOpcode() != ISD::ADD ||
- Ptr.getOperand(0) != Ptrs[Idx.index()+1])
+ Ptr.getOperand(0) != Ptrs[Idx.index() + 1])
return SDValue();
SDValue Offset = Ptr.getOperand(1);
if (!Stride)
@@ -13878,12 +13878,9 @@ static SDValue performCONCAT_VECTORSCombine(SDNode *N, SelectionDAG &DAG,
DAG.getSplat(WideVecVT.changeVectorElementType(MVT::i1), DL,
DAG.getConstant(1, DL, MVT::i1));
- SDValue Ops[] = {BaseLd->getChain(),
- IntID,
- DAG.getUNDEF(WideVecVT),
- BasePtr,
- Stride,
- AllOneMask};
+ SDValue Ops[] = {
+ BaseLd->getChain(), IntID, DAG.getUNDEF(WideVecVT), BasePtr, Stride,
+ AllOneMask};
uint64_t MemSize;
if (auto *ConstStride = dyn_cast<ConstantSDNode>(Stride);
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https://github.com/llvm/llvm-project/pull/69282
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