[llvm] [RISCV] Combine trunc (srl zext (x), zext (y)) to srl (x, umin (y, scalarsizeinbits(y) - 1)) (PR #69092)

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Mon Oct 16 08:57:28 PDT 2023

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https://github.com/LWenH edited https://github.com/llvm/llvm-project/pull/69092

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