[llvm] 2f80dfc - [GlobalISel][NFC] Add distinct CHECK/SDAG/GISEL run lines to test.
Amara Emerson via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 13 16:22:02 PDT 2023
Author: Amara Emerson
Date: 2023-10-13T16:21:52-07:00
New Revision: 2f80dfc07978cc9bd48868ca1b6692f10f5bf24b
URL: https://github.com/llvm/llvm-project/commit/2f80dfc07978cc9bd48868ca1b6692f10f5bf24b
DIFF: https://github.com/llvm/llvm-project/commit/2f80dfc07978cc9bd48868ca1b6692f10f5bf24b.diff
LOG: [GlobalISel][NFC] Add distinct CHECK/SDAG/GISEL run lines to test.
Added:
Modified:
llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll b/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
index 7d73e1c6c1d7f41..1b9583464edea76 100644
--- a/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK
-; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK-GISEL
+; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefixes=CHECK,SDAG
+; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GISEL
; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_pre_load
; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_load
@@ -629,12 +629,12 @@
@ptr = global ptr null
define <8 x i8> @test_v8i8_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v8i8_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0, #40]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0, #40]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -650,12 +650,12 @@ define <8 x i8> @test_v8i8_pre_load(ptr %addr) {
}
define <8 x i8> @test_v8i8_post_load(ptr %addr) {
-; CHECK-LABEL: test_v8i8_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0], #40
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0], #40
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -671,12 +671,12 @@ define <8 x i8> @test_v8i8_post_load(ptr %addr) {
}
define void @test_v8i8_pre_store(<8 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i8_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0, #40]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0, #40]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -692,12 +692,12 @@ define void @test_v8i8_pre_store(<8 x i8> %in, ptr %addr) {
}
define void @test_v8i8_post_store(<8 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i8_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0], #40
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0], #40
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -713,12 +713,12 @@ define void @test_v8i8_post_store(<8 x i8> %in, ptr %addr) {
}
define <4 x i16> @test_v4i16_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v4i16_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0, #40]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0, #40]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -734,12 +734,12 @@ define <4 x i16> @test_v4i16_pre_load(ptr %addr) {
}
define <4 x i16> @test_v4i16_post_load(ptr %addr) {
-; CHECK-LABEL: test_v4i16_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0], #40
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0], #40
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -755,12 +755,12 @@ define <4 x i16> @test_v4i16_post_load(ptr %addr) {
}
define void @test_v4i16_pre_store(<4 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i16_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0, #40]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0, #40]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -776,12 +776,12 @@ define void @test_v4i16_pre_store(<4 x i16> %in, ptr %addr) {
}
define void @test_v4i16_post_store(<4 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i16_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0], #40
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0], #40
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -797,12 +797,12 @@ define void @test_v4i16_post_store(<4 x i16> %in, ptr %addr) {
}
define <2 x i32> @test_v2i32_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v2i32_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0, #40]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0, #40]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -818,12 +818,12 @@ define <2 x i32> @test_v2i32_pre_load(ptr %addr) {
}
define <2 x i32> @test_v2i32_post_load(ptr %addr) {
-; CHECK-LABEL: test_v2i32_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0], #40
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0], #40
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -839,12 +839,12 @@ define <2 x i32> @test_v2i32_post_load(ptr %addr) {
}
define void @test_v2i32_pre_store(<2 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i32_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0, #40]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0, #40]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -860,12 +860,12 @@ define void @test_v2i32_pre_store(<2 x i32> %in, ptr %addr) {
}
define void @test_v2i32_post_store(<2 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i32_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0], #40
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0], #40
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -881,12 +881,12 @@ define void @test_v2i32_post_store(<2 x i32> %in, ptr %addr) {
}
define <2 x float> @test_v2f32_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v2f32_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0, #40]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0, #40]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -902,12 +902,12 @@ define <2 x float> @test_v2f32_pre_load(ptr %addr) {
}
define <2 x float> @test_v2f32_post_load(ptr %addr) {
-; CHECK-LABEL: test_v2f32_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0], #40
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0], #40
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -923,12 +923,12 @@ define <2 x float> @test_v2f32_post_load(ptr %addr) {
}
define void @test_v2f32_pre_store(<2 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f32_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0, #40]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0, #40]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -944,12 +944,12 @@ define void @test_v2f32_pre_store(<2 x float> %in, ptr %addr) {
}
define void @test_v2f32_post_store(<2 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f32_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0], #40
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0], #40
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -965,12 +965,12 @@ define void @test_v2f32_post_store(<2 x float> %in, ptr %addr) {
}
define <1 x i64> @test_v1i64_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v1i64_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0, #40]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0, #40]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -986,12 +986,12 @@ define <1 x i64> @test_v1i64_pre_load(ptr %addr) {
}
define <1 x i64> @test_v1i64_post_load(ptr %addr) {
-; CHECK-LABEL: test_v1i64_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr d0, [x0], #40
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr d0, [x0], #40
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -1007,12 +1007,12 @@ define <1 x i64> @test_v1i64_post_load(ptr %addr) {
}
define void @test_v1i64_pre_store(<1 x i64> %in, ptr %addr) {
-; CHECK-LABEL: test_v1i64_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0, #40]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0, #40]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -1028,12 +1028,12 @@ define void @test_v1i64_pre_store(<1 x i64> %in, ptr %addr) {
}
define void @test_v1i64_post_store(<1 x i64> %in, ptr %addr) {
-; CHECK-LABEL: test_v1i64_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str d0, [x0], #40
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str d0, [x0], #40
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -1049,12 +1049,12 @@ define void @test_v1i64_post_store(<1 x i64> %in, ptr %addr) {
}
define <16 x i8> @test_v16i8_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v16i8_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0, #80]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0, #80]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -1070,12 +1070,12 @@ define <16 x i8> @test_v16i8_pre_load(ptr %addr) {
}
define <16 x i8> @test_v16i8_post_load(ptr %addr) {
-; CHECK-LABEL: test_v16i8_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0], #80
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0], #80
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -1091,12 +1091,12 @@ define <16 x i8> @test_v16i8_post_load(ptr %addr) {
}
define void @test_v16i8_pre_store(<16 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v16i8_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0, #80]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0, #80]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -1112,12 +1112,12 @@ define void @test_v16i8_pre_store(<16 x i8> %in, ptr %addr) {
}
define void @test_v16i8_post_store(<16 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v16i8_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0], #80
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0], #80
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -1133,12 +1133,12 @@ define void @test_v16i8_post_store(<16 x i8> %in, ptr %addr) {
}
define <8 x i16> @test_v8i16_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v8i16_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0, #80]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0, #80]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -1154,12 +1154,12 @@ define <8 x i16> @test_v8i16_pre_load(ptr %addr) {
}
define <8 x i16> @test_v8i16_post_load(ptr %addr) {
-; CHECK-LABEL: test_v8i16_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0], #80
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0], #80
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -1175,12 +1175,12 @@ define <8 x i16> @test_v8i16_post_load(ptr %addr) {
}
define void @test_v8i16_pre_store(<8 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i16_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0, #80]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0, #80]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -1196,12 +1196,12 @@ define void @test_v8i16_pre_store(<8 x i16> %in, ptr %addr) {
}
define void @test_v8i16_post_store(<8 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i16_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0], #80
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0], #80
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -1217,12 +1217,12 @@ define void @test_v8i16_post_store(<8 x i16> %in, ptr %addr) {
}
define <4 x i32> @test_v4i32_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v4i32_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0, #80]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0, #80]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -1238,12 +1238,12 @@ define <4 x i32> @test_v4i32_pre_load(ptr %addr) {
}
define <4 x i32> @test_v4i32_post_load(ptr %addr) {
-; CHECK-LABEL: test_v4i32_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0], #80
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0], #80
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -1259,12 +1259,12 @@ define <4 x i32> @test_v4i32_post_load(ptr %addr) {
}
define void @test_v4i32_pre_store(<4 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i32_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0, #80]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0, #80]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -1280,12 +1280,12 @@ define void @test_v4i32_pre_store(<4 x i32> %in, ptr %addr) {
}
define void @test_v4i32_post_store(<4 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i32_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0], #80
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0], #80
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -1302,12 +1302,12 @@ define void @test_v4i32_post_store(<4 x i32> %in, ptr %addr) {
define <4 x float> @test_v4f32_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v4f32_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0, #80]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0, #80]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -1323,12 +1323,12 @@ define <4 x float> @test_v4f32_pre_load(ptr %addr) {
}
define <4 x float> @test_v4f32_post_load(ptr %addr) {
-; CHECK-LABEL: test_v4f32_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0], #80
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0], #80
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -1344,12 +1344,12 @@ define <4 x float> @test_v4f32_post_load(ptr %addr) {
}
define void @test_v4f32_pre_store(<4 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v4f32_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0, #80]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0, #80]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -1365,12 +1365,12 @@ define void @test_v4f32_pre_store(<4 x float> %in, ptr %addr) {
}
define void @test_v4f32_post_store(<4 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v4f32_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0], #80
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0], #80
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -1387,12 +1387,12 @@ define void @test_v4f32_post_store(<4 x float> %in, ptr %addr) {
define <2 x i64> @test_v2i64_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v2i64_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0, #80]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0, #80]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -1408,12 +1408,12 @@ define <2 x i64> @test_v2i64_pre_load(ptr %addr) {
}
define <2 x i64> @test_v2i64_post_load(ptr %addr) {
-; CHECK-LABEL: test_v2i64_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0], #80
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0], #80
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -1429,12 +1429,12 @@ define <2 x i64> @test_v2i64_post_load(ptr %addr) {
}
define void @test_v2i64_pre_store(<2 x i64> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i64_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0, #80]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0, #80]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -1450,12 +1450,12 @@ define void @test_v2i64_pre_store(<2 x i64> %in, ptr %addr) {
}
define void @test_v2i64_post_store(<2 x i64> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i64_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0], #80
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0], #80
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -1472,12 +1472,12 @@ define void @test_v2i64_post_store(<2 x i64> %in, ptr %addr) {
define <2 x double> @test_v2f64_pre_load(ptr %addr) {
-; CHECK-LABEL: test_v2f64_pre_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0, #80]!
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_pre_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0, #80]!
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_pre_load:
; CHECK-GISEL: ; %bb.0:
@@ -1493,12 +1493,12 @@ define <2 x double> @test_v2f64_pre_load(ptr %addr) {
}
define <2 x double> @test_v2f64_post_load(ptr %addr) {
-; CHECK-LABEL: test_v2f64_post_load:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr q0, [x0], #80
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_load:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr q0, [x0], #80
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_load:
; CHECK-GISEL: ; %bb.0:
@@ -1514,12 +1514,12 @@ define <2 x double> @test_v2f64_post_load(ptr %addr) {
}
define void @test_v2f64_pre_store(<2 x double> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f64_pre_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0, #80]!
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_pre_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0, #80]!
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_pre_store:
; CHECK-GISEL: ; %bb.0:
@@ -1535,12 +1535,12 @@ define void @test_v2f64_pre_store(<2 x double> %in, ptr %addr) {
}
define void @test_v2f64_post_store(<2 x double> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f64_post_store:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: adrp x8, _ptr at PAGE
-; CHECK-NEXT: str q0, [x0], #80
-; CHECK-NEXT: str x0, [x8, _ptr at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_store:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: adrp x8, _ptr at PAGE
+; SDAG-NEXT: str q0, [x0], #80
+; SDAG-NEXT: str x0, [x8, _ptr at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_store:
; CHECK-GISEL: ; %bb.0:
@@ -1556,10 +1556,10 @@ define void @test_v2f64_post_store(<2 x double> %in, ptr %addr) {
}
define ptr @test_v16i8_post_imm_st1_lane(<16 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v16i8_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: st1.b { v0 }[3], [x0], #1
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: st1.b { v0 }[3], [x0], #1
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1575,11 +1575,11 @@ define ptr @test_v16i8_post_imm_st1_lane(<16 x i8> %in, ptr %addr) {
}
define ptr @test_v16i8_post_reg_st1_lane(<16 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v16i8_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #2 ; =0x2
-; CHECK-NEXT: st1.b { v0 }[3], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #2 ; =0x2
+; SDAG-NEXT: st1.b { v0 }[3], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1596,10 +1596,10 @@ define ptr @test_v16i8_post_reg_st1_lane(<16 x i8> %in, ptr %addr) {
define ptr @test_v8i16_post_imm_st1_lane(<8 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i16_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: st1.h { v0 }[3], [x0], #2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: st1.h { v0 }[3], [x0], #2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1615,11 +1615,11 @@ define ptr @test_v8i16_post_imm_st1_lane(<8 x i16> %in, ptr %addr) {
}
define ptr @test_v8i16_post_reg_st1_lane(<8 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i16_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #4 ; =0x4
-; CHECK-NEXT: st1.h { v0 }[3], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #4 ; =0x4
+; SDAG-NEXT: st1.h { v0 }[3], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1635,10 +1635,10 @@ define ptr @test_v8i16_post_reg_st1_lane(<8 x i16> %in, ptr %addr) {
}
define ptr @test_v4i32_post_imm_st1_lane(<4 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i32_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: st1.s { v0 }[3], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: st1.s { v0 }[3], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1654,11 +1654,11 @@ define ptr @test_v4i32_post_imm_st1_lane(<4 x i32> %in, ptr %addr) {
}
define ptr @test_v4i32_post_reg_st1_lane(<4 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i32_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #8 ; =0x8
-; CHECK-NEXT: st1.s { v0 }[3], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #8 ; =0x8
+; SDAG-NEXT: st1.s { v0 }[3], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1674,10 +1674,10 @@ define ptr @test_v4i32_post_reg_st1_lane(<4 x i32> %in, ptr %addr) {
}
define ptr @test_v4f32_post_imm_st1_lane(<4 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v4f32_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: st1.s { v0 }[3], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: st1.s { v0 }[3], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1693,11 +1693,11 @@ define ptr @test_v4f32_post_imm_st1_lane(<4 x float> %in, ptr %addr) {
}
define ptr @test_v4f32_post_reg_st1_lane(<4 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v4f32_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #8 ; =0x8
-; CHECK-NEXT: st1.s { v0 }[3], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #8 ; =0x8
+; SDAG-NEXT: st1.s { v0 }[3], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1713,10 +1713,10 @@ define ptr @test_v4f32_post_reg_st1_lane(<4 x float> %in, ptr %addr) {
}
define ptr @test_v2i64_post_imm_st1_lane(<2 x i64> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i64_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: st1.d { v0 }[1], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: st1.d { v0 }[1], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1732,11 +1732,11 @@ define ptr @test_v2i64_post_imm_st1_lane(<2 x i64> %in, ptr %addr) {
}
define ptr @test_v2i64_post_reg_st1_lane(<2 x i64> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i64_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #16 ; =0x10
-; CHECK-NEXT: st1.d { v0 }[1], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #16 ; =0x10
+; SDAG-NEXT: st1.d { v0 }[1], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1752,10 +1752,10 @@ define ptr @test_v2i64_post_reg_st1_lane(<2 x i64> %in, ptr %addr) {
}
define ptr @test_v2f64_post_imm_st1_lane(<2 x double> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f64_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: st1.d { v0 }[1], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: st1.d { v0 }[1], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1771,11 +1771,11 @@ define ptr @test_v2f64_post_imm_st1_lane(<2 x double> %in, ptr %addr) {
}
define ptr @test_v2f64_post_reg_st1_lane(<2 x double> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f64_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #16 ; =0x10
-; CHECK-NEXT: st1.d { v0 }[1], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #16 ; =0x10
+; SDAG-NEXT: st1.d { v0 }[1], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1791,11 +1791,11 @@ define ptr @test_v2f64_post_reg_st1_lane(<2 x double> %in, ptr %addr) {
}
define ptr @test_v8i8_post_imm_st1_lane(<8 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i8_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.b { v0 }[3], [x0], #1
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.b { v0 }[3], [x0], #1
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1812,12 +1812,12 @@ define ptr @test_v8i8_post_imm_st1_lane(<8 x i8> %in, ptr %addr) {
}
define ptr @test_v8i8_post_reg_st1_lane(<8 x i8> %in, ptr %addr) {
-; CHECK-LABEL: test_v8i8_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #2 ; =0x2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.b { v0 }[3], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #2 ; =0x2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.b { v0 }[3], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1834,11 +1834,11 @@ define ptr @test_v8i8_post_reg_st1_lane(<8 x i8> %in, ptr %addr) {
}
define ptr @test_v4i16_post_imm_st1_lane(<4 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i16_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.h { v0 }[3], [x0], #2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.h { v0 }[3], [x0], #2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1855,12 +1855,12 @@ define ptr @test_v4i16_post_imm_st1_lane(<4 x i16> %in, ptr %addr) {
}
define ptr @test_v4i16_post_reg_st1_lane(<4 x i16> %in, ptr %addr) {
-; CHECK-LABEL: test_v4i16_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #4 ; =0x4
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.h { v0 }[3], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #4 ; =0x4
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.h { v0 }[3], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1877,11 +1877,11 @@ define ptr @test_v4i16_post_reg_st1_lane(<4 x i16> %in, ptr %addr) {
}
define ptr @test_v2i32_post_imm_st1_lane(<2 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i32_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.s { v0 }[1], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.s { v0 }[1], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1898,12 +1898,12 @@ define ptr @test_v2i32_post_imm_st1_lane(<2 x i32> %in, ptr %addr) {
}
define ptr @test_v2i32_post_reg_st1_lane(<2 x i32> %in, ptr %addr) {
-; CHECK-LABEL: test_v2i32_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #8 ; =0x8
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.s { v0 }[1], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #8 ; =0x8
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.s { v0 }[1], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1920,11 +1920,11 @@ define ptr @test_v2i32_post_reg_st1_lane(<2 x i32> %in, ptr %addr) {
}
define ptr @test_v2f32_post_imm_st1_lane(<2 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f32_post_imm_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.s { v0 }[1], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.s { v0 }[1], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1941,12 +1941,12 @@ define ptr @test_v2f32_post_imm_st1_lane(<2 x float> %in, ptr %addr) {
}
define ptr @test_v2f32_post_reg_st1_lane(<2 x float> %in, ptr %addr) {
-; CHECK-LABEL: test_v2f32_post_reg_st1_lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: mov w8, #8 ; =0x8
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: st1.s { v0 }[1], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st1_lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: mov w8, #8 ; =0x8
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: st1.s { v0 }[1], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1_lane:
; CHECK-GISEL: ; %bb.0:
@@ -1963,11 +1963,11 @@ define ptr @test_v2f32_post_reg_st1_lane(<2 x float> %in, ptr %addr) {
}
define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v16i8_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.16b { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.16b { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -1982,11 +1982,11 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v16i8_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.16b { v0, v1 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.16b { v0, v1 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2004,11 +2004,11 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr)
define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i8_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.8b { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.8b { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2023,11 +2023,11 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i8_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.8b { v0, v1 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.8b { v0, v1 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2045,11 +2045,11 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr)
define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i16_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.8h { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.8h { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2064,12 +2064,12 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i16_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld2.8h { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld2.8h { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2087,11 +2087,11 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr)
define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i16_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.4h { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.4h { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2106,12 +2106,12 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i16_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld2.4h { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld2.4h { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2129,11 +2129,11 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr)
define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i32_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2148,12 +2148,12 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i32_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2171,11 +2171,11 @@ declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr)
define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i32_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2190,12 +2190,12 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i32_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2213,11 +2213,11 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr)
define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i64_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2232,12 +2232,12 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i64_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2255,11 +2255,11 @@ declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr)
define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1i64_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2274,12 +2274,12 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1i64_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2297,11 +2297,11 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr)
define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4f32_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2316,12 +2316,12 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4f32_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2339,11 +2339,11 @@ declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr)
define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f32_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2358,12 +2358,12 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2(ptr %A, ptr %ptr) {
}
define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f32_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2381,11 +2381,11 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr)
define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f64_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2400,12 +2400,12 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2(ptr %A, ptr %ptr)
}
define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f64_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld2.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2423,11 +2423,11 @@ declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr)
define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1f64_post_imm_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2442,12 +2442,12 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2(ptr %A, ptr %ptr)
}
define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1f64_post_reg_ld2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2:
; CHECK-GISEL: ; %bb.0:
@@ -2465,11 +2465,11 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr)
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v16i8_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.16b { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.16b { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2484,11 +2484,11 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3(ptr %A, ptr
}
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v16i8_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.16b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.16b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2506,11 +2506,11 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr)
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i8_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.8b { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.8b { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2525,11 +2525,11 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3(ptr %A, ptr %ptr
}
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i8_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.8b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.8b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2547,11 +2547,11 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr)
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i16_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.8h { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.8h { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2566,12 +2566,12 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3(ptr %A, ptr
}
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i16_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld3.8h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld3.8h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2589,11 +2589,11 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr)
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i16_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.4h { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.4h { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2608,12 +2608,12 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3(ptr %A, ptr
}
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i16_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld3.4h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld3.4h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2631,11 +2631,11 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr)
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i32_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2650,12 +2650,12 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3(ptr %A, ptr
}
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i32_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2673,11 +2673,11 @@ declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr)
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i32_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2692,12 +2692,12 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3(ptr %A, ptr
}
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i32_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2715,11 +2715,11 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr)
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i64_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2734,12 +2734,12 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3(ptr %A, ptr
}
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i64_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2757,11 +2757,11 @@ declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr)
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1i64_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2776,12 +2776,12 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3(ptr %A, ptr
}
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1i64_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2799,11 +2799,11 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr)
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4f32_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2818,12 +2818,12 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3(ptr %A
}
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4f32_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2841,11 +2841,11 @@ declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f32_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2860,12 +2860,12 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3(ptr %A
}
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f32_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2883,11 +2883,11 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f64_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2902,12 +2902,12 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3(ptr
}
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f64_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2925,11 +2925,11 @@ declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f6
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1f64_post_imm_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2944,12 +2944,12 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3(ptr
}
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1f64_post_reg_ld3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3:
; CHECK-GISEL: ; %bb.0:
@@ -2967,11 +2967,11 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f6
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v16i8_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -2986,11 +2986,11 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4(p
}
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v16i8_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3008,11 +3008,11 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v1
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i8_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3027,11 +3027,11 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4(ptr %A
}
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i8_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3049,11 +3049,11 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i16_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3068,12 +3068,12 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4(p
}
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i16_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3091,11 +3091,11 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i16_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3110,12 +3110,12 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4(p
}
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i16_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3133,11 +3133,11 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i32_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3152,12 +3152,12 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4(p
}
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i32_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3175,11 +3175,11 @@ declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i32_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3194,12 +3194,12 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4(p
}
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i32_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3217,11 +3217,11 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i64_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3236,12 +3236,12 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4(p
}
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i64_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3259,11 +3259,11 @@ declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1i64_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3278,12 +3278,12 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4(p
}
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1i64_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3301,11 +3301,11 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4f32_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3320,12 +3320,12 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
}
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4f32_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3343,11 +3343,11 @@ declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neo
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f32_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3362,12 +3362,12 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
}
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f32_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3385,11 +3385,11 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f64_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3404,12 +3404,12 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
}
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f64_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3427,11 +3427,11 @@ declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1f64_post_imm_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3446,12 +3446,12 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
}
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1f64_post_reg_ld4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4:
; CHECK-GISEL: ; %bb.0:
@@ -3468,11 +3468,11 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr)
define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v16i8_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.16b { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.16b { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3487,11 +3487,11 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v16i8_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.16b { v0, v1 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.16b { v0, v1 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3509,11 +3509,11 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr)
define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i8_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8b { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8b { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3528,11 +3528,11 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i8_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8b { v0, v1 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8b { v0, v1 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3550,11 +3550,11 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr)
define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i16_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8h { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8h { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3569,12 +3569,12 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i16_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1.8h { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1.8h { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3592,11 +3592,11 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr)
define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i16_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4h { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4h { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3611,12 +3611,12 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i16_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1.4h { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1.4h { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3634,11 +3634,11 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr)
define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i32_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3653,12 +3653,12 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i32_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3676,11 +3676,11 @@ declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr)
define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i32_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3695,12 +3695,12 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i32_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3718,11 +3718,11 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr)
define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i64_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3737,12 +3737,12 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i64_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3760,11 +3760,11 @@ declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr)
define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1i64_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3779,12 +3779,12 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x2(ptr %A, ptr %ptr) {
}
define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1i64_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3802,11 +3802,11 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr)
define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4f32_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3821,12 +3821,12 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x2(ptr %A, ptr %ptr)
}
define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4f32_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3844,11 +3844,11 @@ declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr)
define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f32_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3863,12 +3863,12 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x2(ptr %A, ptr %ptr)
}
define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f32_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3886,11 +3886,11 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr)
define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f64_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3905,12 +3905,12 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x2(ptr %A, ptr %pt
}
define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f64_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3928,11 +3928,11 @@ declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr)
define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x2(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1f64_post_imm_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3947,12 +3947,12 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x2(ptr %A, ptr %pt
}
define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1f64_post_reg_ld1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x2:
; CHECK-GISEL: ; %bb.0:
@@ -3970,11 +3970,11 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr)
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v16i8_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.16b { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.16b { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -3989,11 +3989,11 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x3(ptr %A, pt
}
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v16i8_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.16b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.16b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4011,11 +4011,11 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(pt
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i8_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8b { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8b { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4030,11 +4030,11 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x3(ptr %A, ptr %p
}
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i8_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4052,11 +4052,11 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr)
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i16_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8h { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8h { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4071,12 +4071,12 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x3(ptr %A, pt
}
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i16_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1.8h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1.8h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4094,11 +4094,11 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(pt
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i16_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4h { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4h { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4113,12 +4113,12 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x3(ptr %A, pt
}
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i16_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1.4h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1.4h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4136,11 +4136,11 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(pt
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i32_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4155,12 +4155,12 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x3(ptr %A, pt
}
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i32_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4178,11 +4178,11 @@ declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(pt
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i32_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4197,12 +4197,12 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x3(ptr %A, pt
}
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i32_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4220,11 +4220,11 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(pt
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i64_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4239,12 +4239,12 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x3(ptr %A, pt
}
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i64_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4262,11 +4262,11 @@ declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(pt
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1i64_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4281,12 +4281,12 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x3(ptr %A, pt
}
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1i64_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4304,11 +4304,11 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(pt
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4f32_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4323,12 +4323,12 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x3(ptr
}
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4f32_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4346,11 +4346,11 @@ declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f32_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4365,12 +4365,12 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x3(ptr
}
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f32_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4388,11 +4388,11 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f64_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4407,12 +4407,12 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x3(p
}
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f64_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4430,11 +4430,11 @@ declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x3(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1f64_post_imm_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4449,12 +4449,12 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x3(p
}
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1f64_post_reg_ld1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x3:
; CHECK-GISEL: ; %bb.0:
@@ -4472,11 +4472,11 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v16i8_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4491,11 +4491,11 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x4
}
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v16i8_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4513,11 +4513,11 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i8_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4532,11 +4532,11 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x4(ptr
}
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i8_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4554,11 +4554,11 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v8i16_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4573,12 +4573,12 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x4
}
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i16_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4596,11 +4596,11 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i16_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4615,12 +4615,12 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x4
}
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i16_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4638,11 +4638,11 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4i32_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4657,12 +4657,12 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x4
}
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i32_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4680,11 +4680,11 @@ declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i32_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4699,12 +4699,12 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x4
}
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i32_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4722,11 +4722,11 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2i64_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4741,12 +4741,12 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x4
}
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i64_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4764,11 +4764,11 @@ declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1i64_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4783,12 +4783,12 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x4
}
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1i64_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4806,11 +4806,11 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v4f32_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4825,12 +4825,12 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
}
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4f32_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4848,11 +4848,11 @@ declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neo
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f32_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4867,12 +4867,12 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
}
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f32_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4890,11 +4890,11 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v2f64_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4909,12 +4909,12 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
}
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f64_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4932,11 +4932,11 @@ declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x4(ptr %A, ptr %ptr) {
-; CHECK-LABEL: test_v1f64_post_imm_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4951,12 +4951,12 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
}
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v1f64_post_reg_ld1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x4:
; CHECK-GISEL: ; %bb.0:
@@ -4974,11 +4974,11 @@ declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64
define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.16b { v0, v1 }, [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.16b { v0, v1 }, [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -4993,11 +4993,11 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2r(ptr %A, ptr %ptr) noun
}
define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.16b { v0, v1 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.16b { v0, v1 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5015,11 +5015,11 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr) nounwind
define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.8b { v0, v1 }, [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.8b { v0, v1 }, [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5034,11 +5034,11 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwin
}
define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.8b { v0, v1 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.8b { v0, v1 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5056,11 +5056,11 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr) nounwind rea
define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.8h { v0, v1 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.8h { v0, v1 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5075,12 +5075,12 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2r(ptr %A, ptr %ptr) noun
}
define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld2r.8h { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld2r.8h { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5098,11 +5098,11 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr) nounwind
define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.4h { v0, v1 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.4h { v0, v1 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5117,12 +5117,12 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2r(ptr %A, ptr %ptr) noun
}
define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld2r.4h { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld2r.4h { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5140,11 +5140,11 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr) nounwind
define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5159,12 +5159,12 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2r(ptr %A, ptr %ptr) noun
}
define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5181,11 +5181,11 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2r(ptr %A, ptr %ptr, i64
declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr) nounwind readonly
define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5200,12 +5200,12 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2r(ptr %A, ptr %ptr) noun
}
define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5223,11 +5223,11 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr) nounwind
define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5242,12 +5242,12 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2r(ptr %A, ptr %ptr) noun
}
define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5264,11 +5264,11 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2r(ptr %A, ptr %ptr, i64
declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr) nounwind readonly
define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5283,12 +5283,12 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2r(ptr %A, ptr %ptr) noun
}
define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5306,11 +5306,11 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr) nounwind
define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5325,12 +5325,12 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2r(ptr %A, ptr %ptr)
}
define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2r.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5347,11 +5347,11 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2r(ptr %A, ptr %ptr,
declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr) nounwind readonly
define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5366,12 +5366,12 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2r(ptr %A, ptr %ptr)
}
define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld2r.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5389,11 +5389,11 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr) nounw
define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5408,12 +5408,12 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2r(ptr %A, ptr %ptr
}
define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld2r.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5430,11 +5430,11 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2r(ptr %A, ptr %ptr
declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr) nounwind readonly
define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5449,12 +5449,12 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2r(ptr %A, ptr %ptr
}
define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_ld2r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld2r.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld2r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2r:
; CHECK-GISEL: ; %bb.0:
@@ -5472,11 +5472,11 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr) nou
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.16b { v0, v1, v2 }, [x0], #3
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.16b { v0, v1, v2 }, [x0], #3
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5491,11 +5491,11 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3r(ptr %A, ptr
}
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.16b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.16b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5513,11 +5513,11 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.8b { v0, v1, v2 }, [x0], #3
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.8b { v0, v1, v2 }, [x0], #3
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5532,11 +5532,11 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3r(ptr %A, ptr %pt
}
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.8b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.8b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5554,11 +5554,11 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr) no
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.8h { v0, v1, v2 }, [x0], #6
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.8h { v0, v1, v2 }, [x0], #6
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5573,12 +5573,12 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3r(ptr %A, ptr
}
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld3r.8h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld3r.8h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5596,11 +5596,11 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.4h { v0, v1, v2 }, [x0], #6
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.4h { v0, v1, v2 }, [x0], #6
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5615,12 +5615,12 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3r(ptr %A, ptr
}
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld3r.4h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld3r.4h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5638,11 +5638,11 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5657,12 +5657,12 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3r(ptr %A, ptr
}
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5679,11 +5679,11 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3r(ptr %A, ptr
declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr) nounwind readonly
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5698,12 +5698,12 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3r(ptr %A, ptr
}
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5721,11 +5721,11 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5740,12 +5740,12 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3r(ptr %A, ptr
}
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5762,11 +5762,11 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3r(ptr %A, ptr
declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr) nounwind readonly
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5781,12 +5781,12 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3r(ptr %A, ptr
}
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5804,11 +5804,11 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5823,12 +5823,12 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3r(ptr %
}
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5845,11 +5845,11 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3r(ptr %
declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr) nounwind readonly
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5864,12 +5864,12 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3r(ptr %
}
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5887,11 +5887,11 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5906,12 +5906,12 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3r(pt
}
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5928,11 +5928,11 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3r(pt
declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr) nounwind readonly
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5947,12 +5947,12 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3r(pt
}
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_ld3r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld3r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3r:
; CHECK-GISEL: ; %bb.0:
@@ -5970,11 +5970,11 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -5989,11 +5989,11 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4r(
}
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6011,11 +6011,11 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6030,11 +6030,11 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4r(ptr %
}
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6052,11 +6052,11 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6071,12 +6071,12 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4r(
}
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6094,11 +6094,11 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6113,12 +6113,12 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4r(
}
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6136,11 +6136,11 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6155,12 +6155,12 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4r(
}
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6177,11 +6177,11 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4r(
declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr) nounwind readonly
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6196,12 +6196,12 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4r(
}
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6219,11 +6219,11 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6238,12 +6238,12 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4r(
}
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6260,11 +6260,11 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4r(
declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr) nounwind readonly
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6279,12 +6279,12 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4r(
}
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6302,11 +6302,11 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6321,12 +6321,12 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
}
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6343,11 +6343,11 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r
declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr) nounwind readonly
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6362,12 +6362,12 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
}
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6385,11 +6385,11 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6404,12 +6404,12 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
}
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6426,11 +6426,11 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr) nounwind readonly
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6445,12 +6445,12 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
}
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_ld4r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld4r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4r:
; CHECK-GISEL: ; %bb.0:
@@ -6468,13 +6468,13 @@ declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64
define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6491,13 +6491,13 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2lane(ptr %A, ptr %ptr, <
}
define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6517,13 +6517,13 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8>,
define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6540,13 +6540,13 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x
}
define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.b { v0, v1 }[0], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6566,13 +6566,13 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8>, <8 x
define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6589,14 +6589,14 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2lane(ptr %A, ptr %ptr, <
}
define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6616,13 +6616,13 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16>,
define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6639,14 +6639,14 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2lane(ptr %A, ptr %ptr, <
}
define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.h { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6666,13 +6666,13 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16>,
define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6689,14 +6689,14 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2lane(ptr %A, ptr %ptr, <
}
define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6716,13 +6716,13 @@ declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32>,
define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6739,14 +6739,14 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2lane(ptr %A, ptr %ptr, <
}
define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6766,13 +6766,13 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32>,
define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6789,14 +6789,14 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2lane(ptr %A, ptr %ptr, <
}
define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6816,13 +6816,13 @@ declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64>,
define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6838,15 +6838,15 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2lane(ptr %A, ptr %ptr, <
ret { <1 x i64>, <1 x i64> } %ld2
}
-define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C) nounwind {
+; SDAG-LABEL: test_v1i64_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6866,13 +6866,13 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64>,
define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6889,14 +6889,14 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2lane(ptr %A, ptr %pt
}
define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6916,13 +6916,13 @@ declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x fl
define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6939,14 +6939,14 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2lane(ptr %A, ptr %pt
}
define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6966,13 +6966,13 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x fl
define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -6989,14 +6989,14 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2lane(ptr %A, ptr %
}
define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -7016,13 +7016,13 @@ declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x
define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -7039,14 +7039,14 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2lane(ptr %A, ptr %
}
define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_ld2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ld2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2lane:
; CHECK-GISEL: ; %bb.0:
@@ -7066,14 +7066,14 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7091,14 +7091,14 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3lane(ptr %A,
}
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7119,14 +7119,14 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7144,14 +7144,14 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3lane(ptr %A, ptr
}
define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7172,14 +7172,14 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7197,15 +7197,15 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3lane(ptr %A,
}
define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7226,14 +7226,14 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7251,15 +7251,15 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3lane(ptr %A,
}
define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7280,14 +7280,14 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7305,15 +7305,15 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3lane(ptr %A,
}
define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7334,14 +7334,14 @@ declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7359,15 +7359,15 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3lane(ptr %A,
}
define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7388,14 +7388,14 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7413,15 +7413,15 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3lane(ptr %A,
}
define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7442,14 +7442,14 @@ declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7467,15 +7467,15 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3lane(ptr %A,
}
define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7496,14 +7496,14 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7521,15 +7521,15 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3lane(pt
}
define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7550,14 +7550,14 @@ declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7575,15 +7575,15 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3lane(pt
}
define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7604,14 +7604,14 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7629,15 +7629,15 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3lane
}
define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7658,14 +7658,14 @@ declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7683,15 +7683,15 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3lane
}
define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_ld3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3lane:
; CHECK-GISEL: ; %bb.0:
@@ -7712,15 +7712,15 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7739,15 +7739,15 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4la
}
define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7769,15 +7769,15 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lan
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7796,15 +7796,15 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4lane(pt
}
define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7826,15 +7826,15 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7853,16 +7853,16 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4la
}
define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7884,15 +7884,15 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lan
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7911,16 +7911,16 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4la
}
define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7942,15 +7942,15 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lan
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -7969,16 +7969,16 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4la
}
define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8000,15 +8000,15 @@ declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lan
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8027,16 +8027,16 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4la
}
define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8058,15 +8058,15 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lan
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8085,16 +8085,16 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4la
}
define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8116,15 +8116,15 @@ declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lan
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8143,16 +8143,16 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4la
}
define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8174,15 +8174,15 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lan
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8201,16 +8201,16 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i
}
define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8232,15 +8232,15 @@ declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neo
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8259,16 +8259,16 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i
}
define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8290,15 +8290,15 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8317,16 +8317,16 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po
}
define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8348,15 +8348,15 @@ declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8375,16 +8375,16 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po
}
define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_ld4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_ld4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4lane:
; CHECK-GISEL: ; %bb.0:
@@ -8406,12 +8406,12 @@ declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64
define ptr @test_v16i8_post_imm_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.16b { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.16b { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8427,12 +8427,12 @@ define ptr @test_v16i8_post_imm_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
}
define ptr @test_v16i8_post_reg_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.16b { v0, v1 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.16b { v0, v1 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8451,12 +8451,12 @@ declare void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8>, <16 x i8>, ptr)
define ptr @test_v8i8_post_imm_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.8b { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.8b { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8472,12 +8472,12 @@ define ptr @test_v8i8_post_imm_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) n
}
define ptr @test_v8i8_post_reg_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.8b { v0, v1 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.8b { v0, v1 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8496,12 +8496,12 @@ declare void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8>, <8 x i8>, ptr)
define ptr @test_v8i16_post_imm_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.8h { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.8h { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8517,13 +8517,13 @@ define ptr @test_v8i16_post_imm_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
}
define ptr @test_v8i16_post_reg_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.8h { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.8h { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8542,12 +8542,12 @@ declare void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16>, <8 x i16>, ptr)
define ptr @test_v4i16_post_imm_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.4h { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.4h { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8563,13 +8563,13 @@ define ptr @test_v4i16_post_imm_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
}
define ptr @test_v4i16_post_reg_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.4h { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.4h { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8588,12 +8588,12 @@ declare void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16>, <4 x i16>, ptr)
define ptr @test_v4i32_post_imm_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8609,13 +8609,13 @@ define ptr @test_v4i32_post_imm_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
}
define ptr @test_v4i32_post_reg_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8634,12 +8634,12 @@ declare void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32>, <4 x i32>, ptr)
define ptr @test_v2i32_post_imm_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8655,13 +8655,13 @@ define ptr @test_v2i32_post_imm_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
}
define ptr @test_v2i32_post_reg_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8680,12 +8680,12 @@ declare void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32>, <2 x i32>, ptr)
define ptr @test_v2i64_post_imm_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8701,13 +8701,13 @@ define ptr @test_v2i64_post_imm_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
}
define ptr @test_v2i64_post_reg_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8726,12 +8726,12 @@ declare void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64>, <2 x i64>, ptr)
define ptr @test_v1i64_post_imm_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8747,13 +8747,13 @@ define ptr @test_v1i64_post_imm_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
}
define ptr @test_v1i64_post_reg_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8772,12 +8772,12 @@ declare void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64>, <1 x i64>, ptr)
define ptr @test_v4f32_post_imm_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8793,13 +8793,13 @@ define ptr @test_v4f32_post_imm_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
}
define ptr @test_v4f32_post_reg_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8818,12 +8818,12 @@ declare void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float>, <4 x float>, ptr)
define ptr @test_v2f32_post_imm_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8839,13 +8839,13 @@ define ptr @test_v2f32_post_imm_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
}
define ptr @test_v2f32_post_reg_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st2.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st2.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8864,12 +8864,12 @@ declare void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float>, <2 x float>, ptr)
define ptr @test_v2f64_post_imm_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8885,13 +8885,13 @@ define ptr @test_v2f64_post_imm_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
}
define ptr @test_v2f64_post_reg_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8910,12 +8910,12 @@ declare void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double>, <2 x double>, ptr)
define ptr @test_v1f64_post_imm_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8931,13 +8931,13 @@ define ptr @test_v1f64_post_imm_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
}
define ptr @test_v1f64_post_reg_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st2:
; CHECK-GISEL: ; %bb.0:
@@ -8956,13 +8956,13 @@ declare void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double>, <1 x double>, ptr)
define ptr @test_v16i8_post_imm_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.16b { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.16b { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -8979,13 +8979,13 @@ define ptr @test_v16i8_post_imm_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
}
define ptr @test_v16i8_post_reg_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.16b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.16b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9005,13 +9005,13 @@ declare void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, pt
define ptr @test_v8i8_post_imm_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.8b { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.8b { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9028,13 +9028,13 @@ define ptr @test_v8i8_post_imm_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <
}
define ptr @test_v8i8_post_reg_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.8b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.8b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9054,13 +9054,13 @@ declare void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, ptr)
define ptr @test_v8i16_post_imm_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.8h { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.8h { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9077,14 +9077,14 @@ define ptr @test_v8i16_post_imm_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
}
define ptr @test_v8i16_post_reg_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.8h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.8h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9104,13 +9104,13 @@ declare void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, pt
define ptr @test_v4i16_post_imm_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.4h { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.4h { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9127,14 +9127,14 @@ define ptr @test_v4i16_post_imm_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
}
define ptr @test_v4i16_post_reg_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.4h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.4h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9154,13 +9154,13 @@ declare void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, pt
define ptr @test_v4i32_post_imm_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9177,14 +9177,14 @@ define ptr @test_v4i32_post_imm_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
}
define ptr @test_v4i32_post_reg_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9204,13 +9204,13 @@ declare void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, pt
define ptr @test_v2i32_post_imm_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9227,14 +9227,14 @@ define ptr @test_v2i32_post_imm_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
}
define ptr @test_v2i32_post_reg_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9254,13 +9254,13 @@ declare void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, pt
define ptr @test_v2i64_post_imm_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9277,14 +9277,14 @@ define ptr @test_v2i64_post_imm_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
}
define ptr @test_v2i64_post_reg_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9304,13 +9304,13 @@ declare void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, pt
define ptr @test_v1i64_post_imm_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9327,14 +9327,14 @@ define ptr @test_v1i64_post_imm_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
}
define ptr @test_v1i64_post_reg_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9354,13 +9354,13 @@ declare void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, pt
define ptr @test_v4f32_post_imm_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9377,14 +9377,14 @@ define ptr @test_v4f32_post_imm_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
}
define ptr @test_v4f32_post_reg_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9403,14 +9403,14 @@ define ptr @test_v4f32_post_reg_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
declare void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float>, <4 x float>, <4 x float>, ptr)
-define ptr @test_v2f32_post_imm_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+define ptr @test_v2f32_post_imm_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {
+; SDAG-LABEL: test_v2f32_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9427,14 +9427,14 @@ define ptr @test_v2f32_post_imm_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
}
define ptr @test_v2f32_post_reg_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st3.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9454,13 +9454,13 @@ declare void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float>, <2 x float>, <2 x floa
define ptr @test_v2f64_post_imm_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9477,14 +9477,14 @@ define ptr @test_v2f64_post_imm_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
}
define ptr @test_v2f64_post_reg_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9504,13 +9504,13 @@ declare void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double>, <2 x double>, <2 x do
define ptr @test_v1f64_post_imm_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9527,14 +9527,14 @@ define ptr @test_v1f64_post_imm_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
}
define ptr @test_v1f64_post_reg_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st3:
; CHECK-GISEL: ; %bb.0:
@@ -9554,14 +9554,14 @@ declare void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double>, <1 x double>, <1 x do
define ptr @test_v16i8_post_imm_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9579,14 +9579,14 @@ define ptr @test_v16i8_post_imm_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C
}
define ptr @test_v16i8_post_reg_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9607,14 +9607,14 @@ declare void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, <1
define ptr @test_v8i8_post_imm_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9632,14 +9632,14 @@ define ptr @test_v8i8_post_imm_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <
}
define ptr @test_v8i8_post_reg_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9660,14 +9660,14 @@ declare void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i
define ptr @test_v8i16_post_imm_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9685,15 +9685,15 @@ define ptr @test_v8i16_post_imm_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C
}
define ptr @test_v8i16_post_reg_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9714,14 +9714,14 @@ declare void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, <8
define ptr @test_v4i16_post_imm_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9739,15 +9739,15 @@ define ptr @test_v4i16_post_imm_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C
}
define ptr @test_v4i16_post_reg_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9768,14 +9768,14 @@ declare void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>,<4
define ptr @test_v4i32_post_imm_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9793,15 +9793,15 @@ define ptr @test_v4i32_post_imm_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C
}
define ptr @test_v4i32_post_reg_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9822,14 +9822,14 @@ declare void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>,<4
define ptr @test_v2i32_post_imm_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9847,15 +9847,15 @@ define ptr @test_v2i32_post_imm_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C
}
define ptr @test_v2i32_post_reg_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9876,14 +9876,14 @@ declare void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, <2
define ptr @test_v2i64_post_imm_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9901,15 +9901,15 @@ define ptr @test_v2i64_post_imm_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C
}
define ptr @test_v2i64_post_reg_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9930,14 +9930,14 @@ declare void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>,<2
define ptr @test_v1i64_post_imm_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9955,15 +9955,15 @@ define ptr @test_v1i64_post_imm_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C
}
define ptr @test_v1i64_post_reg_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -9984,14 +9984,14 @@ declare void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>,<1
define ptr @test_v4f32_post_imm_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10009,15 +10009,15 @@ define ptr @test_v4f32_post_imm_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float
}
define ptr @test_v4f32_post_reg_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10038,14 +10038,14 @@ declare void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float>, <4 x float>, <4 x floa
define ptr @test_v2f32_post_imm_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10063,15 +10063,15 @@ define ptr @test_v2f32_post_imm_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float
}
define ptr @test_v2f32_post_reg_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10092,14 +10092,14 @@ declare void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float>, <2 x float>, <2 x floa
define ptr @test_v2f64_post_imm_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10117,15 +10117,15 @@ define ptr @test_v2f64_post_imm_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x doub
}
define ptr @test_v2f64_post_reg_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10146,14 +10146,14 @@ declare void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double>, <2 x double>, <2 x do
define ptr @test_v1f64_post_imm_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10171,15 +10171,15 @@ define ptr @test_v1f64_post_imm_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x doub
}
define ptr @test_v1f64_post_reg_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st4:
; CHECK-GISEL: ; %bb.0:
@@ -10200,12 +10200,12 @@ declare void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double>, <1 x double>, <1 x do
define ptr @test_v16i8_post_imm_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.16b { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.16b { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10221,12 +10221,12 @@ define ptr @test_v16i8_post_imm_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
}
define ptr @test_v16i8_post_reg_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.16b { v0, v1 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.16b { v0, v1 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10245,12 +10245,12 @@ declare void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8>, <16 x i8>, ptr)
define ptr @test_v8i8_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.8b { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.8b { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10266,12 +10266,12 @@ define ptr @test_v8i8_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C)
}
define ptr @test_v8i8_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.8b { v0, v1 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.8b { v0, v1 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10290,12 +10290,12 @@ declare void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8>, <8 x i8>, ptr)
define ptr @test_v8i16_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.8h { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.8h { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10311,13 +10311,13 @@ define ptr @test_v8i16_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
}
define ptr @test_v8i16_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.8h { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.8h { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10336,12 +10336,12 @@ declare void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16>, <8 x i16>, ptr)
define ptr @test_v4i16_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.4h { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.4h { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10357,13 +10357,13 @@ define ptr @test_v4i16_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
}
define ptr @test_v4i16_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.4h { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.4h { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10382,12 +10382,12 @@ declare void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16>, <4 x i16>, ptr)
define ptr @test_v4i32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10403,13 +10403,13 @@ define ptr @test_v4i32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
}
define ptr @test_v4i32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10428,12 +10428,12 @@ declare void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32>, <4 x i32>, ptr)
define ptr @test_v2i32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10449,13 +10449,13 @@ define ptr @test_v2i32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
}
define ptr @test_v2i32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10474,12 +10474,12 @@ declare void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32>, <2 x i32>, ptr)
define ptr @test_v2i64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10495,13 +10495,13 @@ define ptr @test_v2i64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
}
define ptr @test_v2i64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10520,12 +10520,12 @@ declare void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64>, <2 x i64>, ptr)
define ptr @test_v1i64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10541,13 +10541,13 @@ define ptr @test_v1i64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
}
define ptr @test_v1i64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10566,12 +10566,12 @@ declare void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64>, <1 x i64>, ptr)
define ptr @test_v4f32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.4s { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.4s { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10587,13 +10587,13 @@ define ptr @test_v4f32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
}
define ptr @test_v4f32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.4s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.4s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10612,12 +10612,12 @@ declare void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float>, <4 x float>, ptr)
define ptr @test_v2f32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.2s { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.2s { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10633,13 +10633,13 @@ define ptr @test_v2f32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
}
define ptr @test_v2f32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.2s { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.2s { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10658,12 +10658,12 @@ declare void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float>, <2 x float>, ptr)
define ptr @test_v2f64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.2d { v0, v1 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.2d { v0, v1 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10679,13 +10679,13 @@ define ptr @test_v2f64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
}
define ptr @test_v2f64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st1.2d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st1.2d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10704,12 +10704,12 @@ declare void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double>, <2 x double>, ptr)
define ptr @test_v1f64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10725,13 +10725,13 @@ define ptr @test_v1f64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
}
define ptr @test_v1f64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st1x2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
-; CHECK-NEXT: st1.1d { v0, v1 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st1x2:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1
+; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x2:
; CHECK-GISEL: ; %bb.0:
@@ -10750,13 +10750,13 @@ declare void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double>, <1 x double>, ptr)
define ptr @test_v16i8_post_imm_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.16b { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.16b { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10773,13 +10773,13 @@ define ptr @test_v16i8_post_imm_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
}
define ptr @test_v16i8_post_reg_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.16b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.16b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10799,13 +10799,13 @@ declare void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>,
define ptr @test_v8i8_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.8b { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.8b { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10822,13 +10822,13 @@ define ptr @test_v8i8_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C,
}
define ptr @test_v8i8_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.8b { v0, v1, v2 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.8b { v0, v1, v2 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10848,13 +10848,13 @@ declare void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, ptr)
define ptr @test_v8i16_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.8h { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.8h { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10871,14 +10871,14 @@ define ptr @test_v8i16_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
}
define ptr @test_v8i16_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.8h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.8h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10898,13 +10898,13 @@ declare void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>,
define ptr @test_v4i16_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.4h { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.4h { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10921,14 +10921,14 @@ define ptr @test_v4i16_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
}
define ptr @test_v4i16_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.4h { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.4h { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10948,13 +10948,13 @@ declare void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>,
define ptr @test_v4i32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10971,14 +10971,14 @@ define ptr @test_v4i32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
}
define ptr @test_v4i32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -10998,13 +10998,13 @@ declare void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>,
define ptr @test_v2i32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11021,14 +11021,14 @@ define ptr @test_v2i32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
}
define ptr @test_v2i32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11048,13 +11048,13 @@ declare void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>,
define ptr @test_v2i64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11071,14 +11071,14 @@ define ptr @test_v2i64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
}
define ptr @test_v2i64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11098,13 +11098,13 @@ declare void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>,
define ptr @test_v1i64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11121,14 +11121,14 @@ define ptr @test_v1i64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
}
define ptr @test_v1i64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11148,13 +11148,13 @@ declare void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>,
define ptr @test_v4f32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11171,14 +11171,14 @@ define ptr @test_v4f32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
}
define ptr @test_v4f32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.4s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11198,13 +11198,13 @@ declare void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float>, <4 x float>, <4 x fl
define ptr @test_v2f32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11221,14 +11221,14 @@ define ptr @test_v2f32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
}
define ptr @test_v2f32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.2s { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11248,13 +11248,13 @@ declare void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float>, <2 x float>, <2 x fl
define ptr @test_v2f64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], #48
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], #48
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11271,14 +11271,14 @@ define ptr @test_v2f64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
}
define ptr @test_v2f64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st1.2d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11298,13 +11298,13 @@ declare void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double>, <2 x double>, <2 x
define ptr @test_v1f64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11321,14 +11321,14 @@ define ptr @test_v1f64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
}
define ptr @test_v1f64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st1x3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
-; CHECK-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st1x3:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2
+; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x3:
; CHECK-GISEL: ; %bb.0:
@@ -11348,14 +11348,14 @@ declare void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double>, <1 x double>, <1 x
define ptr @test_v16i8_post_imm_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11373,14 +11373,14 @@ define ptr @test_v16i8_post_imm_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8>
}
define ptr @test_v16i8_post_reg_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11401,14 +11401,14 @@ declare void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>,
define ptr @test_v8i8_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11426,14 +11426,14 @@ define ptr @test_v8i8_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C,
}
define ptr @test_v8i8_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11454,14 +11454,14 @@ declare void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x
define ptr @test_v8i16_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11479,15 +11479,15 @@ define ptr @test_v8i16_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16>
}
define ptr @test_v8i16_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11508,14 +11508,14 @@ declare void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>,
define ptr @test_v4i16_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11533,15 +11533,15 @@ define ptr @test_v4i16_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16>
}
define ptr @test_v4i16_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11562,14 +11562,14 @@ declare void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>,<
define ptr @test_v4i32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11587,15 +11587,15 @@ define ptr @test_v4i32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32>
}
define ptr @test_v4i32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11616,14 +11616,14 @@ declare void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>,<
define ptr @test_v2i32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11641,15 +11641,15 @@ define ptr @test_v2i32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32>
}
define ptr @test_v2i32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11670,14 +11670,14 @@ declare void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>,
define ptr @test_v2i64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11695,15 +11695,15 @@ define ptr @test_v2i64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64>
}
define ptr @test_v2i64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11724,14 +11724,14 @@ declare void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>,<
define ptr @test_v1i64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11749,15 +11749,15 @@ define ptr @test_v1i64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64>
}
define ptr @test_v1i64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11778,14 +11778,14 @@ declare void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>,<
define ptr @test_v4f32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11803,15 +11803,15 @@ define ptr @test_v4f32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x flo
}
define ptr @test_v4f32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11832,14 +11832,14 @@ declare void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float>, <4 x float>, <4 x fl
define ptr @test_v2f32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11857,15 +11857,15 @@ define ptr @test_v2f32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x flo
}
define ptr @test_v2f32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11886,14 +11886,14 @@ declare void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float>, <2 x float>, <2 x fl
define ptr @test_v2f64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11911,15 +11911,15 @@ define ptr @test_v2f64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x do
}
define ptr @test_v2f64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11940,14 +11940,14 @@ declare void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double>, <2 x double>, <2 x
define ptr @test_v1f64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11965,15 +11965,15 @@ define ptr @test_v1f64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
}
define ptr @test_v1f64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st1x4:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
-; CHECK-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st1x4:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3
+; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x4:
; CHECK-GISEL: ; %bb.0:
@@ -11993,12 +11993,12 @@ define ptr @test_v1f64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x do
declare void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, <1 x double>, ptr)
define ptr @test_v16i8_post_imm_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], #2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], #2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12014,12 +12014,12 @@ define ptr @test_v16i8_post_imm_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
}
define ptr @test_v16i8_post_reg_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12038,12 +12038,12 @@ declare void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8>, <16 x i8>, i64, ptr)
define ptr @test_v8i8_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], #2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], #2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12059,12 +12059,12 @@ define ptr @test_v8i8_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
}
define ptr @test_v8i8_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.b { v0, v1 }[0], [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12083,12 +12083,12 @@ declare void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8>, <8 x i8>, i64, ptr)
define ptr @test_v8i16_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12104,13 +12104,13 @@ define ptr @test_v8i16_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
}
define ptr @test_v8i16_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12129,12 +12129,12 @@ declare void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16>, <8 x i16>, i64, ptr)
define ptr @test_v4i16_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12150,13 +12150,13 @@ define ptr @test_v4i16_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
}
define ptr @test_v4i16_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.h { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12175,12 +12175,12 @@ declare void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16>, <4 x i16>, i64, ptr)
define ptr @test_v4i32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12196,13 +12196,13 @@ define ptr @test_v4i32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
}
define ptr @test_v4i32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12221,12 +12221,12 @@ declare void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32>, <4 x i32>, i64, ptr)
define ptr @test_v2i32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12242,13 +12242,13 @@ define ptr @test_v2i32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
}
define ptr @test_v2i32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12267,12 +12267,12 @@ declare void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32>, <2 x i32>, i64, ptr)
define ptr @test_v2i64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12288,13 +12288,13 @@ define ptr @test_v2i64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
}
define ptr @test_v2i64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12313,12 +12313,12 @@ declare void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64>, <2 x i64>, i64, ptr)
define ptr @test_v1i64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12334,13 +12334,13 @@ define ptr @test_v1i64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
}
define ptr @test_v1i64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12359,12 +12359,12 @@ declare void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64>, <1 x i64>, i64, ptr)
define ptr @test_v4f32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12380,13 +12380,13 @@ define ptr @test_v4f32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
}
define ptr @test_v4f32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12405,12 +12405,12 @@ declare void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float>, <4 x float>, i64,
define ptr @test_v2f32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12426,13 +12426,13 @@ define ptr @test_v2f32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
}
define ptr @test_v2f32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.s { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12451,12 +12451,12 @@ declare void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float>, <2 x float>, i64,
define ptr @test_v2f64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12472,13 +12472,13 @@ define ptr @test_v2f64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
}
define ptr @test_v2f64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12497,12 +12497,12 @@ declare void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double>, <2 x double>, i64
define ptr @test_v1f64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12518,13 +12518,13 @@ define ptr @test_v1f64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
}
define ptr @test_v1f64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st2lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
-; CHECK-NEXT: st2.d { v0, v1 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st2lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1
+; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st2lane:
; CHECK-GISEL: ; %bb.0:
@@ -12543,13 +12543,13 @@ declare void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double>, <1 x double>, i64
define ptr @test_v16i8_post_imm_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12565,14 +12565,14 @@ define ptr @test_v16i8_post_imm_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
ret ptr %tmp
}
-define ptr @test_v16i8_post_reg_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2
-; CHECK-NEXT: ret
+define ptr @test_v16i8_post_reg_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind {
+; SDAG-LABEL: test_v16i8_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12592,13 +12592,13 @@ declare void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>
define ptr @test_v8i8_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12615,13 +12615,13 @@ define ptr @test_v8i8_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
}
define ptr @test_v8i8_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12641,13 +12641,13 @@ declare void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, i6
define ptr @test_v8i16_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12664,14 +12664,14 @@ define ptr @test_v8i16_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
}
define ptr @test_v8i16_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12691,13 +12691,13 @@ declare void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>
define ptr @test_v4i16_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12714,14 +12714,14 @@ define ptr @test_v4i16_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
}
define ptr @test_v4i16_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12741,13 +12741,13 @@ declare void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>
define ptr @test_v4i32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12764,14 +12764,14 @@ define ptr @test_v4i32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
}
define ptr @test_v4i32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12791,13 +12791,13 @@ declare void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>
define ptr @test_v2i32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12814,14 +12814,14 @@ define ptr @test_v2i32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
}
define ptr @test_v2i32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12841,13 +12841,13 @@ declare void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>
define ptr @test_v2i64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12864,14 +12864,14 @@ define ptr @test_v2i64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
}
define ptr @test_v2i64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12891,13 +12891,13 @@ declare void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>
define ptr @test_v1i64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12914,14 +12914,14 @@ define ptr @test_v1i64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
}
define ptr @test_v1i64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12941,13 +12941,13 @@ declare void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>
define ptr @test_v4f32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12964,14 +12964,14 @@ define ptr @test_v4f32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
}
define ptr @test_v4f32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -12991,13 +12991,13 @@ declare void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float>, <4 x float>, <4 x
define ptr @test_v2f32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -13014,14 +13014,14 @@ define ptr @test_v2f32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
}
define ptr @test_v2f32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -13041,13 +13041,13 @@ declare void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float>, <2 x float>, <2 x
define ptr @test_v2f64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -13064,14 +13064,14 @@ define ptr @test_v2f64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
}
define ptr @test_v2f64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -13091,13 +13091,13 @@ declare void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double>, <2 x double>, <2
define ptr @test_v1f64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -13114,14 +13114,14 @@ define ptr @test_v1f64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
}
define ptr @test_v1f64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st3lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
-; CHECK-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st3lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2
+; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st3lane:
; CHECK-GISEL: ; %bb.0:
@@ -13141,14 +13141,14 @@ declare void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double>, <1 x double>, <1
define ptr @test_v16i8_post_imm_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind {
-; CHECK-LABEL: test_v16i8_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13166,14 +13166,14 @@ define ptr @test_v16i8_post_imm_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8
}
define ptr @test_v16i8_post_reg_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v16i8_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13194,14 +13194,14 @@ declare void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>
define ptr @test_v8i8_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind {
-; CHECK-LABEL: test_v8i8_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13219,14 +13219,14 @@ define ptr @test_v8i8_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %
}
define ptr @test_v8i8_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i8_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13247,14 +13247,14 @@ declare void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8
define ptr @test_v8i16_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind {
-; CHECK-LABEL: test_v8i16_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13272,15 +13272,15 @@ define ptr @test_v8i16_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16
}
define ptr @test_v8i16_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v8i16_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13301,14 +13301,14 @@ declare void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>
define ptr @test_v4i16_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind {
-; CHECK-LABEL: test_v4i16_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13326,15 +13326,15 @@ define ptr @test_v4i16_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16
}
define ptr @test_v4i16_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i16_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13355,14 +13355,14 @@ declare void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>
define ptr @test_v4i32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind {
-; CHECK-LABEL: test_v4i32_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13380,15 +13380,15 @@ define ptr @test_v4i32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32
}
define ptr @test_v4i32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4i32_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13409,14 +13409,14 @@ declare void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>
define ptr @test_v2i32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind {
-; CHECK-LABEL: test_v2i32_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13434,15 +13434,15 @@ define ptr @test_v2i32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32
}
define ptr @test_v2i32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i32_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13463,14 +13463,14 @@ declare void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>
define ptr @test_v2i64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind {
-; CHECK-LABEL: test_v2i64_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13488,15 +13488,15 @@ define ptr @test_v2i64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64
}
define ptr @test_v2i64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2i64_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13517,14 +13517,14 @@ declare void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>
define ptr @test_v1i64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind {
-; CHECK-LABEL: test_v1i64_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13542,15 +13542,15 @@ define ptr @test_v1i64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64
}
define ptr @test_v1i64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1i64_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1i64_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1i64_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13571,14 +13571,14 @@ declare void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>
define ptr @test_v4f32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind {
-; CHECK-LABEL: test_v4f32_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13596,15 +13596,15 @@ define ptr @test_v4f32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x f
}
define ptr @test_v4f32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v4f32_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13625,14 +13625,14 @@ declare void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float>, <4 x float>, <4 x
define ptr @test_v2f32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind {
-; CHECK-LABEL: test_v2f32_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13650,15 +13650,15 @@ define ptr @test_v2f32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x f
}
define ptr @test_v2f32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f32_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13679,14 +13679,14 @@ declare void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float>, <2 x float>, <2 x
define ptr @test_v2f64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind {
-; CHECK-LABEL: test_v2f64_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13704,15 +13704,15 @@ define ptr @test_v2f64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x
}
define ptr @test_v2f64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v2f64_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13733,14 +13733,14 @@ declare void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double>, <2 x double>, <2
define ptr @test_v1f64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind {
-; CHECK-LABEL: test_v1f64_post_imm_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_imm_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_imm_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13758,15 +13758,15 @@ define ptr @test_v1f64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x
}
define ptr @test_v1f64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind {
-; CHECK-LABEL: test_v1f64_post_reg_st4lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
-; CHECK-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v1f64_post_reg_st4lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
+; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v1f64_post_reg_st4lane:
; CHECK-GISEL: ; %bb.0:
@@ -13791,12 +13791,6 @@ define <16 x i8> @test_v16i8_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.16b { v0 }, [x0], #1
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1r:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: ld1r.16b { v0 }, [x0], #1
-; CHECK-GISEL-NEXT: str x0, [x1]
-; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1
@@ -13825,12 +13819,6 @@ define <16 x i8> @test_v16i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.16b { v0 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1r:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: ld1r.16b { v0 }, [x0], x2
-; CHECK-GISEL-NEXT: str x0, [x1]
-; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <16 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1
@@ -13859,12 +13847,6 @@ define <8 x i8> @test_v8i8_post_imm_ld1r(ptr %bar, ptr %ptr) {
; CHECK-NEXT: ld1r.8b { v0 }, [x0], #1
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1r:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: ld1r.8b { v0 }, [x0], #1
-; CHECK-GISEL-NEXT: str x0, [x1]
-; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1
@@ -13885,12 +13867,6 @@ define <8 x i8> @test_v8i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
; CHECK-NEXT: ld1r.8b { v0 }, [x0], x2
; CHECK-NEXT: str x0, [x1]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1r:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: ld1r.8b { v0 }, [x0], x2
-; CHECK-GISEL-NEXT: str x0, [x1]
-; CHECK-GISEL-NEXT: ret
%tmp1 = load i8, ptr %bar
%tmp2 = insertelement <8 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp1, i32 0
%tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1
@@ -13906,11 +13882,11 @@ define <8 x i8> @test_v8i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <8 x i16> @test_v8i16_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v8i16_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.8h { v0 }, [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.8h { v0 }, [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -13933,12 +13909,12 @@ define <8 x i16> @test_v8i16_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <8 x i16> @test_v8i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v8i16_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1r.8h { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1r.8h { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -13961,11 +13937,11 @@ define <8 x i16> @test_v8i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <4 x i16> @test_v4i16_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v4i16_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.4h { v0 }, [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.4h { v0 }, [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -13984,12 +13960,12 @@ define <4 x i16> @test_v4i16_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <4 x i16> @test_v4i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i16_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1r.4h { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1r.4h { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14008,11 +13984,11 @@ define <4 x i16> @test_v4i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <4 x i32> @test_v4i32_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v4i32_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.4s { v0 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.4s { v0 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14031,12 +14007,12 @@ define <4 x i32> @test_v4i32_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <4 x i32> @test_v4i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4i32_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1r.4s { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1r.4s { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14055,11 +14031,11 @@ define <4 x i32> @test_v4i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <2 x i32> @test_v2i32_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v2i32_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.2s { v0 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.2s { v0 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14076,12 +14052,12 @@ define <2 x i32> @test_v2i32_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <2 x i32> @test_v2i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i32_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1r.2s { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1r.2s { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14098,11 +14074,11 @@ define <2 x i32> @test_v2i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <2 x i64> @test_v2i64_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v2i64_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.2d { v0 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.2d { v0 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14119,12 +14095,12 @@ define <2 x i64> @test_v2i64_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <2 x i64> @test_v2i64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2i64_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1r.2d { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1r.2d { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14141,11 +14117,11 @@ define <2 x i64> @test_v2i64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <4 x float> @test_v4f32_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v4f32_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.4s { v0 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.4s { v0 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14164,12 +14140,12 @@ define <4 x float> @test_v4f32_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <4 x float> @test_v4f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v4f32_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1r.4s { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1r.4s { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14188,11 +14164,11 @@ define <4 x float> @test_v4f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <2 x float> @test_v2f32_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v2f32_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.2s { v0 }, [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.2s { v0 }, [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14209,12 +14185,12 @@ define <2 x float> @test_v2f32_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <2 x float> @test_v2f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f32_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1r.2s { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1r.2s { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14231,11 +14207,11 @@ define <2 x float> @test_v2f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <2 x double> @test_v2f64_post_imm_ld1r(ptr %bar, ptr %ptr) {
-; CHECK-LABEL: test_v2f64_post_imm_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1r.2d { v0 }, [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1r.2d { v0 }, [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14252,12 +14228,12 @@ define <2 x double> @test_v2f64_post_imm_ld1r(ptr %bar, ptr %ptr) {
}
define <2 x double> @test_v2f64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
-; CHECK-LABEL: test_v2f64_post_reg_ld1r:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1r.2d { v0 }, [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld1r:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1r.2d { v0 }, [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1r:
; CHECK-GISEL: ; %bb.0:
@@ -14274,11 +14250,11 @@ define <2 x double> @test_v2f64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) {
}
define <16 x i8> @test_v16i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <16 x i8> %A) {
-; CHECK-LABEL: test_v16i8_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.b { v0 }[1], [x0], #1
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.b { v0 }[1], [x0], #1
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14295,11 +14271,11 @@ define <16 x i8> @test_v16i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <16 x i8> %A)
}
define <16 x i8> @test_v16i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <16 x i8> %A) {
-; CHECK-LABEL: test_v16i8_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.b { v0 }[1], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v16i8_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.b { v0 }[1], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14316,13 +14292,13 @@ define <16 x i8> @test_v16i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <16
}
define <8 x i8> @test_v8i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i8> %A) {
-; CHECK-LABEL: test_v8i8_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.b { v0 }[1], [x0], #1
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.b { v0 }[1], [x0], #1
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14341,13 +14317,13 @@ define <8 x i8> @test_v8i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i8> %A) {
}
define <8 x i8> @test_v8i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i8> %A) {
-; CHECK-LABEL: test_v8i8_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.b { v0 }[1], [x0], x2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i8_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.b { v0 }[1], [x0], x2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14366,11 +14342,11 @@ define <8 x i8> @test_v8i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i
}
define <8 x i16> @test_v8i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i16> %A) {
-; CHECK-LABEL: test_v8i16_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.h { v0 }[1], [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.h { v0 }[1], [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14387,12 +14363,12 @@ define <8 x i16> @test_v8i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i16> %A)
}
define <8 x i16> @test_v8i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i16> %A) {
-; CHECK-LABEL: test_v8i16_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ld1.h { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v8i16_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ld1.h { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14409,13 +14385,13 @@ define <8 x i16> @test_v8i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x
}
define <4 x i16> @test_v4i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i16> %A) {
-; CHECK-LABEL: test_v4i16_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.h { v0 }[1], [x0], #2
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.h { v0 }[1], [x0], #2
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14434,14 +14410,14 @@ define <4 x i16> @test_v4i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i16> %A)
}
define <4 x i16> @test_v4i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x i16> %A) {
-; CHECK-LABEL: test_v4i16_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.h { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.h { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14460,11 +14436,11 @@ define <4 x i16> @test_v4i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x
}
define <4 x i32> @test_v4i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i32> %A) {
-; CHECK-LABEL: test_v4i32_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14481,12 +14457,12 @@ define <4 x i32> @test_v4i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i32> %A)
}
define <4 x i32> @test_v4i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x i32> %A) {
-; CHECK-LABEL: test_v4i32_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i32_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14503,13 +14479,13 @@ define <4 x i32> @test_v4i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x
}
define <2 x i32> @test_v2i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i32> %A) {
-; CHECK-LABEL: test_v2i32_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14528,14 +14504,14 @@ define <2 x i32> @test_v2i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i32> %A)
}
define <2 x i32> @test_v2i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x i32> %A) {
-; CHECK-LABEL: test_v2i32_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i32_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14554,11 +14530,11 @@ define <2 x i32> @test_v2i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x
}
define <2 x i64> @test_v2i64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i64> %A) {
-; CHECK-LABEL: test_v2i64_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.d { v0 }[1], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.d { v0 }[1], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14575,12 +14551,12 @@ define <2 x i64> @test_v2i64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i64> %A)
}
define <2 x i64> @test_v2i64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x i64> %A) {
-; CHECK-LABEL: test_v2i64_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.d { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2i64_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.d { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14597,11 +14573,11 @@ define <2 x i64> @test_v2i64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x
}
define <4 x float> @test_v4f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x float> %A) {
-; CHECK-LABEL: test_v4f32_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14618,12 +14594,12 @@ define <4 x float> @test_v4f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x float>
}
define <4 x float> @test_v4f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x float> %A) {
-; CHECK-LABEL: test_v4f32_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4f32_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14640,13 +14616,13 @@ define <4 x float> @test_v4f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4
}
define <2 x float> @test_v2f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x float> %A) {
-; CHECK-LABEL: test_v2f32_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], #4
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14665,14 +14641,14 @@ define <2 x float> @test_v2f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x float>
}
define <2 x float> @test_v2f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x float> %A) {
-; CHECK-LABEL: test_v2f32_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #2
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.s { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f32_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #2
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14691,11 +14667,11 @@ define <2 x float> @test_v2f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2
}
define <2 x double> @test_v2f64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x double> %A) {
-; CHECK-LABEL: test_v2f64_post_imm_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.d { v0 }[1], [x0], #8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_imm_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.d { v0 }[1], [x0], #8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14712,12 +14688,12 @@ define <2 x double> @test_v2f64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x double
}
define <2 x double> @test_v2f64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x double> %A) {
-; CHECK-LABEL: test_v2f64_post_reg_ld1lane:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #3
-; CHECK-NEXT: ld1.d { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v2f64_post_reg_ld1lane:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #3
+; SDAG-NEXT: ld1.d { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1lane:
; CHECK-GISEL: ; %bb.0:
@@ -14744,16 +14720,6 @@ define <4 x float> @test_v4f32_post_reg_ld1lane_dep_vec_on_load(ptr %bar, ptr %p
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: mov.s v0[1], v1[0]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1lane_dep_vec_on_load:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: ldr s1, [x0]
-; CHECK-GISEL-NEXT: str q0, [x3]
-; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2
-; CHECK-GISEL-NEXT: ldr q0, [x4]
-; CHECK-GISEL-NEXT: str x8, [x1]
-; CHECK-GISEL-NEXT: mov.s v0[1], v1[0]
-; CHECK-GISEL-NEXT: ret
%tmp1 = load float, ptr %bar
store <4 x float> %vec, ptr %dep_ptr_1, align 16
%A = load <4 x float>, ptr %dep_ptr_2, align 16
@@ -14771,19 +14737,19 @@ define <4 x float> @test_v4f32_post_reg_ld1lane_dep_vec_on_load(ptr %bar, ptr %p
; legalizer to run. We achieve that using the ctpop.
; PR23265
define <4 x i16> @test_v4i16_post_reg_ld1lane_forced_narrow(ptr %bar, ptr %ptr, i64 %inc, <4 x i16> %A, ptr %d) {
-; CHECK-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: lsl x8, x2, #1
-; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT: ld1.h { v0 }[1], [x0], x8
-; CHECK-NEXT: str x0, [x1]
-; CHECK-NEXT: ldr d1, [x3]
-; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT: cnt.8b v1, v1
-; CHECK-NEXT: uaddlp.4h v1, v1
-; CHECK-NEXT: uaddlp.2s v1, v1
-; CHECK-NEXT: str d1, [x3]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: lsl x8, x2, #1
+; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0
+; SDAG-NEXT: ld1.h { v0 }[1], [x0], x8
+; SDAG-NEXT: str x0, [x1]
+; SDAG-NEXT: ldr d1, [x3]
+; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0
+; SDAG-NEXT: cnt.8b v1, v1
+; SDAG-NEXT: uaddlp.4h v1, v1
+; SDAG-NEXT: uaddlp.2s v1, v1
+; SDAG-NEXT: str d1, [x3]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow:
; CHECK-GISEL: ; %bb.0:
@@ -14812,15 +14778,15 @@ define <4 x i16> @test_v4i16_post_reg_ld1lane_forced_narrow(ptr %bar, ptr %ptr,
declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
define void @test_ld1lane_build(ptr %ptr0, ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %out) {
-; CHECK-LABEL: test_ld1lane_build:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr s0, [x2]
-; CHECK-NEXT: ldr s1, [x0]
-; CHECK-NEXT: ld1.s { v0 }[1], [x3]
-; CHECK-NEXT: ld1.s { v1 }[1], [x1]
-; CHECK-NEXT: sub.2s v0, v1, v0
-; CHECK-NEXT: str d0, [x4]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_ld1lane_build:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr s0, [x2]
+; SDAG-NEXT: ldr s1, [x0]
+; SDAG-NEXT: ld1.s { v0 }[1], [x3]
+; SDAG-NEXT: ld1.s { v1 }[1], [x1]
+; SDAG-NEXT: sub.2s v0, v1, v0
+; SDAG-NEXT: str d0, [x4]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_ld1lane_build:
; CHECK-GISEL: ; %bb.0:
@@ -14849,15 +14815,15 @@ define void @test_ld1lane_build(ptr %ptr0, ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr
}
define void @test_ld1lane_build_i16(ptr %a, ptr %b, ptr %c, ptr %d, <4 x i16> %e, ptr %p) {
-; CHECK-LABEL: test_ld1lane_build_i16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr h1, [x0]
-; CHECK-NEXT: ld1.h { v1 }[1], [x1]
-; CHECK-NEXT: ld1.h { v1 }[2], [x2]
-; CHECK-NEXT: ld1.h { v1 }[3], [x3]
-; CHECK-NEXT: sub.4h v0, v1, v0
-; CHECK-NEXT: str d0, [x4]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_ld1lane_build_i16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr h1, [x0]
+; SDAG-NEXT: ld1.h { v1 }[1], [x1]
+; SDAG-NEXT: ld1.h { v1 }[2], [x2]
+; SDAG-NEXT: ld1.h { v1 }[3], [x3]
+; SDAG-NEXT: sub.4h v0, v1, v0
+; SDAG-NEXT: str d0, [x4]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_ld1lane_build_i16:
; CHECK-GISEL: ; %bb.0:
@@ -14885,18 +14851,18 @@ define void @test_ld1lane_build_i16(ptr %a, ptr %b, ptr %c, ptr %d, <4 x i16> %
}
define void @test_ld1lane_build_half(ptr %a, ptr %b, ptr %c, ptr %d, <4 x half> %e, ptr %p) {
-; CHECK-LABEL: test_ld1lane_build_half:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr h1, [x0]
-; CHECK-NEXT: fcvtl v0.4s, v0.4h
-; CHECK-NEXT: ld1.h { v1 }[1], [x1]
-; CHECK-NEXT: ld1.h { v1 }[2], [x2]
-; CHECK-NEXT: ld1.h { v1 }[3], [x3]
-; CHECK-NEXT: fcvtl v1.4s, v1.4h
-; CHECK-NEXT: fsub.4s v0, v1, v0
-; CHECK-NEXT: fcvtn v0.4h, v0.4s
-; CHECK-NEXT: str d0, [x4]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_ld1lane_build_half:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr h1, [x0]
+; SDAG-NEXT: fcvtl v0.4s, v0.4h
+; SDAG-NEXT: ld1.h { v1 }[1], [x1]
+; SDAG-NEXT: ld1.h { v1 }[2], [x2]
+; SDAG-NEXT: ld1.h { v1 }[3], [x3]
+; SDAG-NEXT: fcvtl v1.4s, v1.4h
+; SDAG-NEXT: fsub.4s v0, v1, v0
+; SDAG-NEXT: fcvtn v0.4h, v0.4s
+; SDAG-NEXT: str d0, [x4]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_ld1lane_build_half:
; CHECK-GISEL: ; %bb.0:
@@ -14927,20 +14893,20 @@ define void @test_ld1lane_build_half(ptr %a, ptr %b, ptr %c, ptr %d, <4 x half>
}
define void @test_ld1lane_build_i8(ptr %a, ptr %b, ptr %c, ptr %d, ptr %e, ptr %f, ptr %g, ptr %h, <8 x i8> %v, ptr %p) {
-; CHECK-LABEL: test_ld1lane_build_i8:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ldr b1, [x0]
-; CHECK-NEXT: ldr x8, [sp]
-; CHECK-NEXT: ld1.b { v1 }[1], [x1]
-; CHECK-NEXT: ld1.b { v1 }[2], [x2]
-; CHECK-NEXT: ld1.b { v1 }[3], [x3]
-; CHECK-NEXT: ld1.b { v1 }[4], [x4]
-; CHECK-NEXT: ld1.b { v1 }[5], [x5]
-; CHECK-NEXT: ld1.b { v1 }[6], [x6]
-; CHECK-NEXT: ld1.b { v1 }[7], [x7]
-; CHECK-NEXT: sub.8b v0, v1, v0
-; CHECK-NEXT: str d0, [x8]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_ld1lane_build_i8:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ldr b1, [x0]
+; SDAG-NEXT: ldr x8, [sp]
+; SDAG-NEXT: ld1.b { v1 }[1], [x1]
+; SDAG-NEXT: ld1.b { v1 }[2], [x2]
+; SDAG-NEXT: ld1.b { v1 }[3], [x3]
+; SDAG-NEXT: ld1.b { v1 }[4], [x4]
+; SDAG-NEXT: ld1.b { v1 }[5], [x5]
+; SDAG-NEXT: ld1.b { v1 }[6], [x6]
+; SDAG-NEXT: ld1.b { v1 }[7], [x7]
+; SDAG-NEXT: sub.8b v0, v1, v0
+; SDAG-NEXT: str d0, [x8]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_ld1lane_build_i8:
; CHECK-GISEL: ; %bb.0:
@@ -14985,14 +14951,14 @@ define void @test_ld1lane_build_i8(ptr %a, ptr %b, ptr %c, ptr %d, ptr %e, ptr
}
define <4 x i32> @test_inc_cycle(<4 x i32> %vec, ptr %in) {
-; CHECK-LABEL: test_inc_cycle:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ld1.s { v0 }[0], [x0]
-; CHECK-NEXT: adrp x9, _var at PAGE
-; CHECK-NEXT: fmov x8, d0
-; CHECK-NEXT: add x8, x0, x8, lsl #2
-; CHECK-NEXT: str x8, [x9, _var at PAGEOFF]
-; CHECK-NEXT: ret
+; SDAG-LABEL: test_inc_cycle:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ld1.s { v0 }[0], [x0]
+; SDAG-NEXT: adrp x9, _var at PAGE
+; SDAG-NEXT: fmov x8, d0
+; SDAG-NEXT: add x8, x0, x8, lsl #2
+; SDAG-NEXT: str x8, [x9, _var at PAGEOFF]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: test_inc_cycle:
; CHECK-GISEL: ; %bb.0:
@@ -15019,18 +14985,18 @@ define <4 x i32> @test_inc_cycle(<4 x i32> %vec, ptr %in) {
@var = global ptr null
define i8 @load_single_extract_variable_index_i8(ptr %A, i32 %idx) {
-; CHECK-LABEL: load_single_extract_variable_index_i8:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: sub sp, sp, #16
-; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: mov x8, sp
-; CHECK-NEXT: ldr q0, [x0]
-; CHECK-NEXT: ; kill: def $w1 killed $w1 def $x1
-; CHECK-NEXT: bfxil x8, x1, #0, #4
-; CHECK-NEXT: str q0, [sp]
-; CHECK-NEXT: ldrb w0, [x8]
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: load_single_extract_variable_index_i8:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: sub sp, sp, #16
+; SDAG-NEXT: .cfi_def_cfa_offset 16
+; SDAG-NEXT: mov x8, sp
+; SDAG-NEXT: ldr q0, [x0]
+; SDAG-NEXT: ; kill: def $w1 killed $w1 def $x1
+; SDAG-NEXT: bfxil x8, x1, #0, #4
+; SDAG-NEXT: str q0, [sp]
+; SDAG-NEXT: ldrb w0, [x8]
+; SDAG-NEXT: add sp, sp, #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: load_single_extract_variable_index_i8:
; CHECK-GISEL: ; %bb.0:
@@ -15052,18 +15018,18 @@ define i8 @load_single_extract_variable_index_i8(ptr %A, i32 %idx) {
}
define i16 @load_single_extract_variable_index_i16(ptr %A, i32 %idx) {
-; CHECK-LABEL: load_single_extract_variable_index_i16:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: sub sp, sp, #16
-; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: mov x8, sp
-; CHECK-NEXT: ldr q0, [x0]
-; CHECK-NEXT: ; kill: def $w1 killed $w1 def $x1
-; CHECK-NEXT: bfi x8, x1, #1, #3
-; CHECK-NEXT: str q0, [sp]
-; CHECK-NEXT: ldrh w0, [x8]
-; CHECK-NEXT: add sp, sp, #16
-; CHECK-NEXT: ret
+; SDAG-LABEL: load_single_extract_variable_index_i16:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: sub sp, sp, #16
+; SDAG-NEXT: .cfi_def_cfa_offset 16
+; SDAG-NEXT: mov x8, sp
+; SDAG-NEXT: ldr q0, [x0]
+; SDAG-NEXT: ; kill: def $w1 killed $w1 def $x1
+; SDAG-NEXT: bfi x8, x1, #1, #3
+; SDAG-NEXT: str q0, [sp]
+; SDAG-NEXT: ldrh w0, [x8]
+; SDAG-NEXT: add sp, sp, #16
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: load_single_extract_variable_index_i16:
; CHECK-GISEL: ; %bb.0:
@@ -15083,12 +15049,12 @@ define i16 @load_single_extract_variable_index_i16(ptr %A, i32 %idx) {
}
define i32 @load_single_extract_variable_index_i32(ptr %A, i32 %idx) {
-; CHECK-LABEL: load_single_extract_variable_index_i32:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: ; kill: def $w1 killed $w1 def $x1
-; CHECK-NEXT: and x8, x1, #0x3
-; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]
-; CHECK-NEXT: ret
+; SDAG-LABEL: load_single_extract_variable_index_i32:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: ; kill: def $w1 killed $w1 def $x1
+; SDAG-NEXT: and x8, x1, #0x3
+; SDAG-NEXT: ldr w0, [x0, x8, lsl #2]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: load_single_extract_variable_index_i32:
; CHECK-GISEL: ; %bb.0:
@@ -15116,15 +15082,6 @@ define i32 @load_single_extract_variable_index_v3i32_small_align(ptr %A, i32 %id
; CHECK-NEXT: csel x8, x9, x8, lo
; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: load_single_extract_variable_index_v3i32_small_align:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: mov w9, w1
-; CHECK-GISEL-NEXT: mov w8, #2 ; =0x2
-; CHECK-GISEL-NEXT: cmp x9, #2
-; CHECK-GISEL-NEXT: csel x8, x9, x8, lo
-; CHECK-GISEL-NEXT: ldr w0, [x0, x8, lsl #2]
-; CHECK-GISEL-NEXT: ret
%lv = load <3 x i32>, ptr %A, align 2
%e = extractelement <3 x i32> %lv, i32 %idx
ret i32 %e
@@ -15139,15 +15096,6 @@ define i32 @load_single_extract_variable_index_v3i32_default_align(ptr %A, i32 %
; CHECK-NEXT: csel x8, x9, x8, lo
; CHECK-NEXT: ldr w0, [x0, x8, lsl #2]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: load_single_extract_variable_index_v3i32_default_align:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: mov w9, w1
-; CHECK-GISEL-NEXT: mov w8, #2 ; =0x2
-; CHECK-GISEL-NEXT: cmp x9, #2
-; CHECK-GISEL-NEXT: csel x8, x9, x8, lo
-; CHECK-GISEL-NEXT: ldr w0, [x0, x8, lsl #2]
-; CHECK-GISEL-NEXT: ret
%lv = load <3 x i32>, ptr %A
%e = extractelement <3 x i32> %lv, i32 %idx
ret i32 %e
@@ -15158,22 +15106,17 @@ define i32 @load_single_extract_valid_const_index_v3i32(ptr %A, i32 %idx) {
; CHECK: ; %bb.0:
; CHECK-NEXT: ldr w0, [x0, #8]
; CHECK-NEXT: ret
-;
-; CHECK-GISEL-LABEL: load_single_extract_valid_const_index_v3i32:
-; CHECK-GISEL: ; %bb.0:
-; CHECK-GISEL-NEXT: ldr w0, [x0, #8]
-; CHECK-GISEL-NEXT: ret
%lv = load <3 x i32>, ptr %A
%e = extractelement <3 x i32> %lv, i32 2
ret i32 %e
}
define i32 @load_single_extract_variable_index_masked_i32(ptr %A, i32 %idx) {
-; CHECK-LABEL: load_single_extract_variable_index_masked_i32:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: and w8, w1, #0x3
-; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2]
-; CHECK-NEXT: ret
+; SDAG-LABEL: load_single_extract_variable_index_masked_i32:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: and w8, w1, #0x3
+; SDAG-NEXT: ldr w0, [x0, w8, uxtw #2]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: load_single_extract_variable_index_masked_i32:
; CHECK-GISEL: ; %bb.0:
@@ -15193,11 +15136,11 @@ define i32 @load_single_extract_variable_index_masked_i32(ptr %A, i32 %idx) {
}
define i32 @load_single_extract_variable_index_masked2_i32(ptr %A, i32 %idx) {
-; CHECK-LABEL: load_single_extract_variable_index_masked2_i32:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: and w8, w1, #0x1
-; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2]
-; CHECK-NEXT: ret
+; SDAG-LABEL: load_single_extract_variable_index_masked2_i32:
+; SDAG: ; %bb.0:
+; SDAG-NEXT: and w8, w1, #0x1
+; SDAG-NEXT: ldr w0, [x0, w8, uxtw #2]
+; SDAG-NEXT: ret
;
; CHECK-GISEL-LABEL: load_single_extract_variable_index_masked2_i32:
; CHECK-GISEL: ; %bb.0:
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