[llvm] [AArch64] Fix tryMergeAdjacentSTG function in PrologEpilog pass (PR #68873)

[Evgenii Stepanov via llvm-commits]

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@@ -3703,6 +3703,17 @@ bool isMergeableStackTaggingInstruction(MachineInstr &MI, int64_t &Offset,
   return true;
 }
 
+bool isNZCVLiveOut(MachineBasicBlock &MBB) {
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eugenis wrote:

I can not find `MBB.isLiveOut` anywhere. Does it exist? There is LiveVariables::isLiveOut, but that only works for virtual regs.

Anyway, I've not touched backend code in a long while. This seems very conservative but correct to me.

https://github.com/llvm/llvm-project/pull/68873