[llvm] b49a0db - [AMDGPU] Fix comments about afn and arcp in fast unsafe fdiv handling (#68982)

via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 13 11:23:57 PDT 2023


Author: Jay Foad
Date: 2023-10-13T19:23:53+01:00
New Revision: b49a0dbaebc7f4023d54d7ea0c4719c5740dcebe

URL: https://github.com/llvm/llvm-project/commit/b49a0dbaebc7f4023d54d7ea0c4719c5740dcebe
DIFF: https://github.com/llvm/llvm-project/commit/b49a0dbaebc7f4023d54d7ea0c4719c5740dcebe.diff

LOG: [AMDGPU] Fix comments about afn and arcp in fast unsafe fdiv handling (#68982)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 4797e5a7a61d4cf..02cb77f6ecaca4e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -4641,8 +4641,8 @@ bool AMDGPULegalizerInfo::legalizeFastUnsafeFDIV(MachineInstr &MI,
     }
   }
 
-  // For f16 require arcp only.
-  // For f32 require afn+arcp.
+  // For f16 require afn or arcp.
+  // For f32 require afn.
   if (!AllowInaccurateRcp && (ResTy != LLT::scalar(16) ||
                               !MI.getFlag(MachineInstr::FmArcp)))
     return false;

diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 9bd0f5390b19e31..33f65ab786584fd 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -9577,8 +9577,8 @@ SDValue SITargetLowering::lowerFastUnsafeFDIV(SDValue Op,
     }
   }
 
-  // For f16 require arcp only.
-  // For f32 require afn+arcp.
+  // For f16 require afn or arcp.
+  // For f32 require afn.
   if (!AllowInaccurateRcp && (VT != MVT::f16 || !Flags.hasAllowReciprocal()))
     return SDValue();
 


        


More information about the llvm-commits mailing list