[llvm] [BOLT][RISCV] Implement MCPlusBuilder::equals (PR #68989)

[Job Noorman via llvm-commits]

https://github.com/mtvec created https://github.com/llvm/llvm-project/pull/68989

This enables ICF for RISC-V.

No tests are added by this commit as `bolt-icf.test` covers this case (only on a RISC-V host though).

>From 1d63a3f3db654de838f625cdf563ec79f453fbd1 Mon Sep 17 00:00:00 2001
From: Job Noorman <jnoorman at igalia.com>
Date: Fri, 13 Oct 2023 13:34:49 +0200
Subject: [PATCH] [BOLT][RISCV] Implement MCPlusBuilder::equals

This enables ICF for RISC-V.

No tests are added by this commit as `bolt-icf.test` covers this case
(only on a RISC-V host though).
---
 bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp b/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
index af7645f5684711b..b95d599bafb2035 100644
--- a/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
+++ b/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
@@ -31,6 +31,17 @@ class RISCVMCPlusBuilder : public MCPlusBuilder {
 public:
   using MCPlusBuilder::MCPlusBuilder;
 
+  bool equals(const MCTargetExpr &A, const MCTargetExpr &B,
+              CompFuncTy Comp) const override {
+    const auto &RISCVExprA = cast<RISCVMCExpr>(A);
+    const auto &RISCVExprB = cast<RISCVMCExpr>(B);
+    if (RISCVExprA.getKind() != RISCVExprB.getKind())
+      return false;
+
+    return MCPlusBuilder::equals(*RISCVExprA.getSubExpr(),
+                                 *RISCVExprB.getSubExpr(), Comp);
+  }
+
   bool shouldRecordCodeRelocation(uint64_t RelType) const override {
     switch (RelType) {
     case ELF::R_RISCV_JAL: