[llvm] [AVR] Support return address intrinsics (PR #67266)
Emil J via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 12 12:31:39 PDT 2023
================
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple=avr | FileCheck %s
+
+declare ptr @llvm.addressofreturnaddress()
+
+define ptr @a() {
+; CHECK-LABEL: a:
+; CHECK: ; %bb.0:
+; CHECK-NEXT: push r28
+; CHECK-NEXT: push r29
+; CHECK-NEXT: in r28, 61
+; CHECK-NEXT: in r29, 62
+; CHECK-NEXT: mov r24, r28
+; CHECK-NEXT: mov r25, r29
+; CHECK-NEXT: adiw r24, 3
----------------
ekliptik wrote:
GCC accepts two options: SP as implemented here, or short SP (only SPL). Looks like it can be degraded to short SP with `-mtiny-stack`. Full list of AVRs with short SPs as listed by GCC:
```
at90s2313
at90s2323
at90s2333
at90s2343
attiny22
attiny26
at90s4433
attiny13
attiny13a
attiny2313
attiny2313a
attiny24
attiny24a
attiny25
attiny261
attiny261a
```
https://github.com/llvm/llvm-project/pull/67266
More information about the llvm-commits
mailing list