[llvm] [AMDGPU] Rematerialize scalar loads (PR #68778)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 12 08:19:22 PDT 2023
================
@@ -2434,6 +2445,105 @@ bool SIInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
return true;
}
+void SIInstrInfo::reMaterialize(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I, Register DestReg,
+ unsigned SubIdx, const MachineInstr &Orig,
+ const TargetRegisterInfo &RI) const {
+
+ // Try shrinking the instruction to remat only the part needed for current
+ // context.
+ // TODO: Handle more cases.
+ unsigned Opcode = Orig.getOpcode();
+ switch (Opcode) {
+ case AMDGPU::S_LOAD_DWORDX16_IMM:
+ case AMDGPU::S_LOAD_DWORDX8_IMM: {
+ if (SubIdx != 0)
+ break;
+
+ if (I == MBB.end())
+ break;
+
+ if (I->isBundled())
+ break;
+
+ // Look for a single use of the register that is also a subreg.
+ Register RegToFind = Orig.getOperand(0).getReg();
+ int SingleUseIdx = -1;
+ for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
+ const MachineOperand &CandMO = I->getOperand(i);
+ if (!CandMO.isReg())
+ continue;
+ Register CandReg = CandMO.getReg();
+ if (!CandReg)
+ continue;
+
+ if (CandReg == RegToFind || RI.regsOverlap(CandReg, RegToFind)) {
+ if (SingleUseIdx == -1 && CandMO.isUse()) {
+ SingleUseIdx = i;
+ } else {
+ SingleUseIdx = -1;
+ break;
+ }
+ }
+ }
+ if (SingleUseIdx == -1)
+ break;
+ MachineOperand *UseMO = &I->getOperand(SingleUseIdx);
+ if (UseMO->getSubReg() == AMDGPU::NoSubRegister)
+ break;
+
+ unsigned Offset = RI.getSubRegIdxOffset(UseMO->getSubReg());
+ unsigned SubregSize = RI.getSubRegIdxSize(UseMO->getSubReg());
+
+ MachineFunction *MF = MBB.getParent();
+ MachineRegisterInfo &MRI = MF->getRegInfo();
+ assert(MRI.hasAtMostUserInstrs(DestReg, 0) &&
----------------
jayfoad wrote:
`use_nodbg_empty()`?
https://github.com/llvm/llvm-project/pull/68778
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