[llvm] [InstCombine] Fold zext(i1) == lshr(A, BW - 1) => i1 == A s< 0 (PR #68244)

[via llvm-commits]

XChy wrote:

> worth handling other predicates? https://alive2.llvm.org/ce/z/EJAH6Z

Thanks for reminder, I think that's worthwhile and convenient to implement here.
`zext(i1) pred lshr(A, BW - 1)` -> `i1 pred (A s< 0)`
The pattern will be added later.

https://github.com/llvm/llvm-project/pull/68244