[llvm] [SelectionDAG][WebAssembly] Tidy up around endianess and isConstantSplat (PR #68212)

[Björn Pettersson via llvm-commits]

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@@ -7071,12 +7071,23 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
             N1, /*AllowUndef=*/false, /*AllowTruncation=*/true)) {
       Constant = C->getAPIntValue();
     } else if (BuildVectorSDNode *Vector = dyn_cast<BuildVectorSDNode>(N1)) {
+      unsigned EltBitWidth = Vector->getValueType(0).getScalarSizeInBits();
       APInt SplatValue, SplatUndef;
       unsigned SplatBitSize;
       bool HasAnyUndefs;
-      bool IsSplat = Vector->isConstantSplat(SplatValue, SplatUndef,
-                                             SplatBitSize, HasAnyUndefs);
-      if (IsSplat) {
+      // Endianess should not matter here. Code below makes sure that we only
+      // use the result if the SplatBitSize is a mulitple of the vector element
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bjope wrote:

typo: mulitple/multiple

https://github.com/llvm/llvm-project/pull/68212