[llvm] [AMDGPU] Change the representation of double literals in operands (PR #68740)

[Stanislav Mekhanoshin via llvm-commits]

================
@@ -4297,7 +4301,18 @@ bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst,
       continue;
 
     if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) {
-      uint32_t Value = static_cast<uint32_t>(MO.getImm());
+      uint64_t Value = static_cast<uint64_t>(MO.getImm());
+      bool IsFP = AMDGPU::isSISrcFPOperand(Desc, OpIdx);
----------------
rampitec wrote:

Yes, this is allowed. Encoded literal is 32-bit and can be used as both integer and double. For example in the gfx11_asm_vop3.s:
```
v_trig_preop_f64 v[254:255], 0xaf123456, 0xaf123456 clamp div:2
// GFX11: encoding: [0xfe,0x80,0x2f,0xd7,0xff,0xfe,0x01,0x18,0x56,0x34,0x12,0xaf]
```
Without this piece of code it would give error:
```
llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding  <<< 'v_trig_preop_f64 v[254:255], 0xaf123456, 0xaf123456 clamp div:2'
<stdin>:1:42: error: only one unique literal operand is allowed
v_trig_preop_f64 v[254:255], 0xaf123456, 0xaf123456 clamp div:2
                                         ^
```

https://github.com/llvm/llvm-project/pull/68740