[llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)

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john-brawn-arm wrote:

> Sorry I missed this - github isn't a great system at times.
> 
> This will create larger stores than we had in the past? Is it worth making this "little endian only", or are the smaller stores not worth it, when you start considering the load-store forwarding and that kind of thing?

We only get larger stores in cases where previously a spill of a 32-bit sub-register of a 128-bit register was widened to a 64-bit spill (and now becomes a 128-bit spill). If we want to do a smaller store it would be better to do it deliberately so e.g. the above case would become a 32-bit spill.

> And does the IsFill code below have similar problems, or is it already valid?

That's fine because there the spill slot is the same size as the sub-register destination of the COPY and it's not changing the size of the fill, just doing it to the destination of the COPY instead of the source, saving a copy. We're missing a test though for the opposite case (a spill slot larger than the sub-register destination of the COPY), so I'll add that.

https://github.com/llvm/llvm-project/pull/65601