[llvm] [IR] Add intrinsics to represent complex multiply and divide operations (PR #68742)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 11 07:12:50 PDT 2023
================
@@ -31750,6 +31806,68 @@ bool X86TargetLowering::isInlineAsmTargetBranch(
return Inst.equals_insensitive("call") || Inst.equals_insensitive("jmp");
}
+bool X86TargetLowering::CustomLowerComplexMultiply(Type *FloatTy) const {
+ auto VecTy = cast<FixedVectorType>(FloatTy);
+ unsigned VecSize = VecTy->getNumElements() * VecTy->getScalarSizeInBits();
+ Type *ElementTy = VecTy->getElementType();
+ if (ElementTy->isHalfTy()) {
+ // All the half type need avx512fp16 enabled.
+ if (VecSize == 512)
+ // For 512-bt vector type, just avx512fp16 needed.
+ return Subtarget.hasFP16();
+ else
+ // 128-bit, 256-bit vector type are legal and other vector type can
+ // be widened or split. AVX512VL should be enabled.
+ return Subtarget.hasFP16() && Subtarget.hasVLX();
+ }
+ if (ElementTy->isFloatTy() || ElementTy->isDoubleTy()) {
+ if (VecSize == 512)
+ // For 512-bt vector type, they are legal or can be split.
+ return Subtarget.hasAVX512() || Subtarget.hasAnyFMA();
+ // 128-bit, 256-bit vector type are legal or and other type can
+ // be widened or split.
+ return Subtarget.hasAnyFMA() ||
+ (Subtarget.hasAVX512() && Subtarget.hasVLX());
+ }
+ return false;
----------------
RKSimon wrote:
Can't we use the TLI isOperationLegal to do this? It seems to match the DAG setOperationAction setup earlier in the file.
https://github.com/llvm/llvm-project/pull/68742
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