[llvm] 255f826 - [X86] Fix value-extending/truncating loads and stores of __ptr32/__ptr64 pointers (#67168)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 10 20:19:40 PDT 2023
Author: Evgenii Kudriashov
Date: 2023-10-11T05:19:36+02:00
New Revision: 255f826d6f656bad17cc0aeacbd20306c266f653
URL: https://github.com/llvm/llvm-project/commit/255f826d6f656bad17cc0aeacbd20306c266f653
DIFF: https://github.com/llvm/llvm-project/commit/255f826d6f656bad17cc0aeacbd20306c266f653.diff
LOG: [X86] Fix value-extending/truncating loads and stores of __ptr32/__ptr64 pointers (#67168)
The value extension and truncation were missed during casting __ptr32/__ptr64
pointers to the default address space.
Closes #66873
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index f2716b08c4d0312..13684babb2385ea 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -49835,9 +49835,9 @@ static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
if (PtrVT != Ld->getBasePtr().getSimpleValueType()) {
SDValue Cast =
DAG.getAddrSpaceCast(dl, PtrVT, Ld->getBasePtr(), AddrSpace, 0);
- return DAG.getLoad(RegVT, dl, Ld->getChain(), Cast, Ld->getPointerInfo(),
- Ld->getOriginalAlign(),
- Ld->getMemOperand()->getFlags());
+ return DAG.getExtLoad(Ext, dl, RegVT, Ld->getChain(), Cast,
+ Ld->getPointerInfo(), MemVT, Ld->getOriginalAlign(),
+ Ld->getMemOperand()->getFlags());
}
}
@@ -50339,9 +50339,10 @@ static SDValue combineStore(SDNode *N, SelectionDAG &DAG,
if (PtrVT != St->getBasePtr().getSimpleValueType()) {
SDValue Cast =
DAG.getAddrSpaceCast(dl, PtrVT, St->getBasePtr(), AddrSpace, 0);
- return DAG.getStore(St->getChain(), dl, StoredVal, Cast,
- St->getPointerInfo(), St->getOriginalAlign(),
- St->getMemOperand()->getFlags(), St->getAAInfo());
+ return DAG.getTruncStore(
+ St->getChain(), dl, StoredVal, Cast, St->getPointerInfo(), StVT,
+ St->getOriginalAlign(), St->getMemOperand()->getFlags(),
+ St->getAAInfo());
}
}
diff --git a/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll b/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
index 2dd6011f36b775f..67539b07f5716c1 100644
--- a/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
+++ b/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
@@ -261,7 +261,7 @@ define i64 @test_load_sptr32_zext_i64(ptr addrspace(270) %i) {
; CHECK-LABEL: test_load_sptr32_zext_i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movslq %ecx, %rax
-; CHECK-NEXT: movq (%rax), %rax
+; CHECK-NEXT: movl (%rax), %eax
; CHECK-NEXT: retq
;
; CHECK-O0-LABEL: test_load_sptr32_zext_i64:
@@ -278,11 +278,20 @@ entry:
}
define void @test_store_sptr32_trunc_i1(ptr addrspace(270) %s, i32 %i) {
-; ALL-LABEL: test_store_sptr32_trunc_i1:
-; ALL: # %bb.0: # %entry
-; ALL-NEXT: movslq %ecx, %rax
-; ALL-NEXT: movl %edx, (%rax)
-; ALL-NEXT: retq
+; CHECK-LABEL: test_store_sptr32_trunc_i1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movslq %ecx, %rax
+; CHECK-NEXT: andl $1, %edx
+; CHECK-NEXT: movb %dl, (%rax)
+; CHECK-NEXT: retq
+;
+; CHECK-O0-LABEL: test_store_sptr32_trunc_i1:
+; CHECK-O0: # %bb.0: # %entry
+; CHECK-O0-NEXT: movslq %ecx, %rax
+; CHECK-O0-NEXT: andl $1, %edx
+; CHECK-O0-NEXT: movb %dl, %cl
+; CHECK-O0-NEXT: movb %cl, (%rax)
+; CHECK-O0-NEXT: retq
entry:
%0 = trunc i32 %i to i1
store i1 %0, ptr addrspace(270) %s
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